As a powerful enabling technology, three-dimensional (3D) integration, which uses wafer
bonding to integrate multiple wafers in the vertical direction and uses through‑silicon-vias …

For future miniaturization of electronic systems using 3D chip stacking, new fine-pitch
materials for through-silicon-via (TSV) applications are likely required. In this paper, we …

This paper presents the fabrication and electrical characterization of superconducting high-
aspect ratio through-silicon vias DC-sputtered with aluminum. Fully conformal and void-free …

Abstract Three-dimensional (3-D) integration and packaging with through silicon via (TSV) is
an emerging trend for overcoming the limitation of integration scale in Micro-electro …

A crucial challenge in three-dimensional multi-chip assemblies is to establish electrical
connections between discrete devices. Here, we apply laser printing of congruent voxels of …

Ultra-deep through-silicon-vias (TSVs) are of great demand for 3D heterogeneous
integration. However, most reported deep TSVs adopt double-sided silicon etching and …

Driven by ever-growing demands on 3D integration, various state-of-the-art electronics
packaging techniques have been developed. This study presents a novel and cost-efficient …

A novel, simple, low-cost method for the void-free filling of high aspect ratio (HAR) through-
silicon-vias (TSVs) is presented. For the first-time pure indium, a type-I superconductor …

The fabrication of through silicon vias with high aspect ratio is one of the key technologies
for the miniaturization of 3-D integration systems. Cu as filling metal in vias can diffuse into …

The authors report the fabrication of a 3-D ZnO-nanowire/MOSFET smart photo sensor using
through silicon via technology. It was found that the MOSFET, prepared by hot-wire chemical …