(57) ABSTRACT A non-volatile memory (NV M) cell and array includes a control capacitor,
tunneling capacitor, CMOS inverter and output circuit. The CMOS inverter includes PMOS …

DGAQECJNVWCQMB-PUAWFVPOSA-M Ilexoside XXIX Chemical compound C [C@@ H]
1CC [C@@] 2 (CC [C@@] 3 (C (= CC [C@ H] 4 [C@] 3 (CC [C@@ H] 5 [C@@] 4 (CC …

H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid
state devices; Multistep manufacturing processes thereof the devices being of types …

G11C11/401—Digital stores characterised by the use of particular electric or magnetic
storage elements; Storage elements therefor using electric elements using semiconductor …

H01L23/538—Arrangements for conducting electric current within the device in operation
from one component to another, ie interconnections, eg wires, lead frames the …

A chip package used as a logic drive, includes: multiple semiconductor chips, a polymer
layer horizontally between the semiconductor chips; multiple metal layers over the …

(57) ABSTRACT A multi-chip package includes a field-programmable-gate array (FPGA)
integrated-circuit (IC) chip configured to perform a logic function based on a truth table …

(60)(57) ABSTRACT Related US Application Data Provisional application No. 62/675,785,
filed on May 24, 2018, provisional application No. 62/729,527, filed on Sep. 11, 2018 …

G11C14/0054—Digital stores characterised by arrangements of cells having volatile and
non-volatile storage properties for back-up when the power is down in which the volatile …

(57) ABSTRACT A three terminal non-volatile memory (NVM) cell for a CMOS IC is formed
by a standard CMOS process? oW. The NVM cell includes tWo transistors that share a …