Intel OpenVINO toolkit for computer vision: Object detection and semantic segmentation

VV Zunin - 2021 International Russian Automation Conference …, 2021 - ieeexplore.ieee.org
The paper provides an overview of the neural networks implementation current state, their
methods of execution, and the Intel® OpenVINO™ Toolkit for executing neural networks on …

Number systems for deep neural network architectures: a survey

G Alsuhli, V Sakellariou, H Saleh, M Al-Qutayri… - arXiv preprint arXiv …, 2023 - arxiv.org
Deep neural networks (DNNs) have become an enabling component for a myriad of artificial
intelligence applications. DNNs have shown sometimes superior performance, even …

[HTML][HTML] Posit and floating-point based Izhikevich neuron: A Comparison of arithmetic

T Fernandez-Hart, JC Knight, T Kalganova - Neurocomputing, 2024 - Elsevier
Reduced precision number formats have become increasingly popular in various fields of
computational science, as they offer the potential to enhance energy efficiency, reduce …

Exploring approximate communication using lossy bitwise compression on interconnection networks

Y Hu - IEEE Access, 2023 - ieeexplore.ieee.org
The use of approximate communication has emerged as a promising approach for
enhancing the efficiency of communication in parallel computer systems. By sending …

Design of a novel low-latency parameterizable posit adder/subtractor using leading one predictor in FPGA

B Özkılbaç, T Karacalı - Digital Signal Processing, 2024 - Elsevier
Posit arithmetic has attracted a lot of attention as a promising alternative to the IEEE754
floating-point number representation thanks to its advantages such as higher accuracy and …

Evaluating the Resiliency of Posits for Scientific Computing

B Schlueter, J Calhoun, A Poulos - Proceedings of the SC'23 Workshops …, 2023 - dl.acm.org
IEEE-754 is the de-facto standard for the implementation of floating-point number systems in
hardware. With the rise of machine-learning and mixed-precision computation, applications …

Hybrid SORN Hardware Accelerator for Support Vector Machines

N Hülsmeier, M Bärthel, J Rust, S Paul - Conference on Next Generation …, 2023 - Springer
This paper presents a new approach for support vector filtering to accelerate the training
process of support vector machines (SVMs). It is based on the Sets-of-Real-Numbers …

POCO: Hardware Characterization of Activation Functions using POSIT-CORDIC Architecture

M Basavaraju, V Rayapati… - 2024 IEEE International …, 2024 - ieeexplore.ieee.org
POSIT offers a wider dynamic range when compared to floating-point (FP) formats with
lesser number of bits. Such data formats are required to address the need for low-bit high …

A Review of Posit Arithmetic for Energy-Efficient Computation: Methodologies, Applications, and Challenges

H Zhang, Z Wei, B Yin, SB Ko - Design and Applications of Emerging …, 2023 - Springer
For many decades, IEEE floating-point formats are used as the golden numeric formats for
many applications including signal processing, linear algebra evaluation, and other …

[图书][B] Tapered-Precision Numerical Formats for Deep Learning Inference and Training

SHF Langroudi - 2023 - search.proquest.com
The demand to deploy deep learning models on edge devices has recently increased due to
their pervasiveness, in applications ranging from healthcare to precision agriculture …