[图书][B] Multiprocessor systems-on-chips

A Jerraya, W Wolf - 2004 - books.google.com
Modern system-on-chip (SoC) design shows a clear trend toward integration of multiple
processor cores on a single chip. Designing a multiprocessor system-on-chip (MPSOC) …

Automatic performance setting for dynamic voltage scaling

K Flautner, S Reinhardt, T Mudge - Proceedings of the 7th annual …, 2001 - dl.acm.org
The emphasis on processors that are both low power and high performance has resulted in
the incorporation of dynamic voltage scaling into processor designs. This feature allows one …

Voltage-clock-scaling adaptive scheduling techniques for low power in hard real-time systems

CM Krishna, YH Lee - … Sixth IEEE Real-Time Technology and …, 2000 - ieeexplore.ieee.org
Many embedded systems operate under severe power and energy constraints. Voltage
clock scaling is one mechanism by which energy consumption may be reduced; it is based …

Vertigo: Automatic performance-setting for linux

K Flautner, T Mudge - ACM SIGOPS Operating Systems Review, 2002 - dl.acm.org
Combining high performance with low power consumption is becoming one of the primary
objectives of processor designs. Instead of relying just on sleep mode for conserving power …

Power-aware scheduling under timing constraints for mission-critical embedded systems

J Liu, PH Chou, N Bagherzadeh… - Proceedings of the 38th …, 2001 - dl.acm.org
Power-aware systems are those that must make the best use of available power. They
subsume traditional low-power systems in that they must not only minimize power when the …

Considering power variations of DVS processing elements for energy minimisation in distributed systems

MT Schmitz, BM Al-Hashimi - … of the 14th international symposium on …, 2001 - dl.acm.org
Dynamic voltage scaling (DVS) is a powerful technique to reduce power dissipation in
embedded systems. Some efficient DVS algorithms have been recently proposed for the …

Energy-conscious compilation based on voltage scaling

H Saputra, M Kandemir, N Vijaykrishnan… - Proceedings of the joint …, 2002 - dl.acm.org
As energy consumption has become a majorconstraint in current system design, it is
essential to look beyond the traditional low-power circuit and architectural optimizations …

Low-energy intra-task voltage scheduling using static timing analysis

D Shin, J Kim, S Lee - Proceedings of the 38th Annual Design …, 2001 - dl.acm.org
We propose an intra-task voltage scheduling algorithm for low-energy hard real-time
applications. Based on a static timing analysis technique, the proposed algorithm controls …

Compiler-directed dynamic voltage/frequency scheduling for energy reduction in microprocessors

CH Hsu, U Kremer, M Hsiao - … of the 2001 international symposium on …, 2001 - dl.acm.org
Dynamic voltage and frequency scaling of the CPU has been identified as one of the most
effective ways to reduce energy consumption of a program. This paper discusses a …

Power-aware operating systems for interactive systems

YH Lu, L Benini, G De Micheli - IEEE transactions on very large …, 2002 - ieeexplore.ieee.org
Many portable systems deploy operating systems (OS) to support versatile functionality and
to manage resources, including power. This paper presents a new approach for using OS to …