Autosos: Towards multi-uav systems supporting maritime search and rescue with lightweight ai and edge computing

JP Queralta, J Raitoharju, TN Gia, N Passalis… - arXiv preprint arXiv …, 2020 - arxiv.org
Rescue vessels are the main actors in maritime safety and rescue operations. At the same
time, aerial drones bring a significant advantage into this scenario. This paper presents the …

VWA: Hardware efficient vectorwise accelerator for convolutional neural network

KW Chang, TS Chang - … Transactions on Circuits and Systems I …, 2019 - ieeexplore.ieee.org
Hardware accelerators for convolution neural networks (CNNs) enable real-time
applications of artificial intelligence technology. However, most of the existing designs suffer …

Enabling on-device classification of ECG with compressed learning for health IoT

W Li, H Chu, B Huang, Y Huan, L Zheng, Z Zou - Microelectronics Journal, 2021 - Elsevier
In this paper, an on-device classification of electrocardiography (ECG) with Compressed
Learning (CL) for health Internet of Things (IoT) is proposed. A CL algorithm combining with …

IECA: An in-execution configuration CNN accelerator with 30.55 GOPS/mm² area efficiency

B Huang, Y Huan, H Chu, J Xu, L Liu… - … on Circuits and …, 2021 - ieeexplore.ieee.org
It remains challenging for a Convolutional Neural Network (CNN) accelerator to maintain
high hardware utilization and low processing latency with restricted on-chip memory. This …

A systolic dataflow based accelerator for CNNs

S Das, A Roy, KK Chandrasekharan… - … on Circuits and …, 2020 - ieeexplore.ieee.org
Modern Artificial Intelligence (AI) systems deploy Convolution Neural Networks (CNN) as
they offer very high accuracy. Computational complexity of CNNs necessitates hardware …

High-Speed CNN Accelerator SoC Design Based on a Flexible Diagonal Cyclic Array

DY Lee, H Aliev, M Junaid, SB Park, HW Kim, KM Lee… - Electronics, 2024 - mdpi.com
The latest convolutional neural network (CNN) models for object detection include complex
layered connections to process inference data. Each layer utilizes different types of kernel …

USCA: A unified systolic convolution array architecture for accelerating sparse neural network

W Liu, J Lin, Z Wang - 2019 IEEE International Symposium on …, 2019 - ieeexplore.ieee.org
Due to the intensive computational complexity and various types of convolution, it is a
challange to implement different CNN models on a specific hardware. Many previous works …

A memory-efficient CNN accelerator using segmented logarithmic quantization and multi-cluster architecture

J Xu, Y Huan, B Huang, H Chu, Y Jin… - … on Circuits and …, 2020 - ieeexplore.ieee.org
This brief presents a memory-efficient CNN accelerator design for resource-constrained
devices in Internet of Things (IoT) and autonomous systems. A segmented logarithmic …

Accelerating convolutional neural network inference based on a reconfigurable sliced systolic array

Y Zeng, H Sun, J Katto, Y Fan - 2021 IEEE International …, 2021 - ieeexplore.ieee.org
Convolutional neural networks (CNNs) have achieved great successes on many computer
vision tasks, such as image recognition, video processing, and target detection. In recent …

[PDF][PDF] CNN Accelerator Using Proposed Diagonal Cyclic Array for Minimizing Memory Accesses.

HW Son, AA Al-Hamid, YS Na, DY Lee… - Computers, Materials & …, 2023 - researchgate.net
This paper presents the architecture of a Convolution Neural Network (CNN) accelerator
based on a new processing element (PE) array called a diagonal cyclic array (DCA). As …