J Yang, Z Yang, J Casas, S Ray - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Modern application-specific System-on-Chip designs include a variety of accelerator blocks that customize microcontrollers with domain-specific instruction sets and optimized …
J Hu, G Wang, G Chen, X Wei - IEEE Access, 2019 - ieeexplore.ieee.org
By using high-level synthesis tools, electronic system level design provides a promising solution to fill the growing design productivity gap of high quality hardware systems …
Y Zhang, W Feng, M Huang - 2016 IEEE 11th Conference on …, 2016 - ieeexplore.ieee.org
Register Transfer Level (RTL) design validation is a crucial stage in the hardware design process. We present a new approach to enhancing RTL design validation using available …
Z Yang, K Hao, K Cong, L Lei, S Ray, F Xie - Proceedings of the 51st …, 2014 - dl.acm.org
Behavioral synthesis entails application of a sequence of transformations to compile a high- level description of a hardware design (eg, in C/C++/SystemC) into a register-transfer level …
B Lin, D Qian - arXiv preprint arXiv:1601.05850, 2016 - arxiv.org
Recently virtual platforms and virtual prototyping techniques have been widely applied for accelerating software development in electronics companies. It has been proved that these …
In this paper, we present an efficient formal approach to check the equivalence of synthesized Register Transfer Level (RTL) against the high level specification in the …
Y Wang, F Xie, Z Yang, P Cocchini, J Yang - … of the 28th Asia and South …, 2023 - dl.acm.org
Agile hardware design enables designers to produce new design iterations efficiently. Equivalence checking is critical in ensuring that a new design iteration conforms to its …
The ever-growing complexity of software and its target hardware makes it increasingly challenging to develop reliable compilers that preserve the semantics of source code during …