Reconfigurable computing architectures

R Tessier, K Pocek, A DeHon - Proceedings of the IEEE, 2015 - ieeexplore.ieee.org
Reconfigurable architectures can bring unique capabilities to computational tasks. They
offer the performance and energy efficiency of hardware with the flexibility of software. In …

[图书][B] Design for embedded image processing on FPGAs

DG Bailey - 2023 - books.google.com
Design for Embedded Image Processing on FPGAs Bridge the gap between software and
hardware with this foundational design reference Field-programmable gate arrays (FPGAs) …

[图书][B] Reconfigurable computing: the theory and practice of FPGA-based computation

S Hauck, A DeHon - 2010 - books.google.com
Reconfigurable Computing marks a revolutionary and hot topic that bridges the gap
between the separate worlds of hardware and software design—the key feature of …

The roles of FPGAs in reprogrammable systems

S Hauck - Proceedings of the IEEE, 1998 - ieeexplore.ieee.org
Reprogrammable systems based on field programmable gate arrays are revolutionizing
some forms of computation and digital logic. As a logic emulation system, they provide …

Dynamically programmable gate array with multiple contexts

A DeHon, TF Knight Jr, E Tau, M Bolotski… - US Patent …, 1998 - Google Patents
An integrated dynamically programmable gate array com prises a two dimensional array of
programmable gates. These gates can be implemented as look up tables but hardwired …

Design patterns for reconfigurable computing

A DeHon, J Adams, M DeLorimier… - 12th Annual IEEE …, 2004 - ieeexplore.ieee.org
It is valuable to identify and catalog design patterns for reconfigurable computing. These
design patterns are canonical solutions to common and recurring design challenges which …

A review of high-level synthesis for dynamically reconfigurable FPGAs

X Zhang, KW Ng - Microprocessors and Microsystems, 2000 - Elsevier
Dynamically Reconfigurable Field Programmable Gate Arrays (DR FPGAs) change many of
the basic assumptions of what hardware is. DR FPGA-based dynamically reconfigurable …

DPGA-coupled microprocessors

A DeHon, M Bolotski, TF Knight Jr - US Patent 6,052,773, 2000 - Google Patents
57 ABSTRACT A Single chip microprocessor or memory device has repro grammable
characteristics according to the invention. In the case of the microprocessor, a fixed …

Enabling in-situ programmability in network data plane: From architecture to language

Y Feng, Z Chen, H Song, W Xu, J Li, Z Zhang… - … USENIX Symposium on …, 2022 - usenix.org
In-situ programmability refers to the capability for network devices to update data plane
functions and protocol processing logic at runtime without interrupting the services, driven by …

Using run-time reconfiguration for fault injection in hardware prototypes

L Antoni, R Leveugle, M Feher - 17th IEEE International …, 2002 - ieeexplore.ieee.org
In this paper, a new methodology for the injection of single event upsets (SEU) in memory
elements is introduced. SEUs in memory elements can occur due to many reasons (eg …