The main contribution of this work is to present several hardware implementations of an “n
choose k” counter (C (n, k) counter for short), which lists all n-bit numbers with (n− k) 0's and …

Parallel prefix circuits are parallel prefix algorithms on the combinational circuit model. A
prefix circuit with n inputs is depth-size optimal if its depth plus size equals 2n-2. Smaller …

Parallel prefix circuits are parallel algorithms performing the prefix operation for the
combinational circuit model. The size of a prefix circuit is the number of operation nodes in …

The main contribution of this paper is to present hardware algorithms for redundant radix-2 r
number system in the FPGA to accelerate Montgomery modulo multiplication with many bits …

The main contribution of this paper is to show a new approach for FM screening which we
call Local Exhaustive Search (LES) method, and to present ways to accelerate the …

The main contribution of this paper is to present a simple, scalable, and portable tiny
processing system which can be implemented in various FPGAs. Our processing system …

Screening is an important task to convert a continuous-tone image into a binary image with
pure black and white pixels. The main contribution of this paper is to show a new algorithm …

Parallel prefix algorithms for the combinational circuit model are called parallel prefix
circuits. An n-input prefix circuit with depth d and size s is depth-size optimal if d+ s= 2 n-2 …

A family of parallel algorithms solving the prefix problem on the combinational circuit model
is presented. These prefix circuits are waist-size optimal with waist 1 (WSO-1). They are not …

Prefix aggregation operation (also called scan), and its particular case, prefix summation, is
an important parallel primitive and enjoys a lot of attention in the research literature. It is also …