Tpp: Transparent page placement for cxl-enabled tiered-memory
The increasing demand for memory in hyperscale applications has led to memory becoming
a large portion of the overall datacenter spend. The emergence of coherent interfaces like …
a large portion of the overall datacenter spend. The emergence of coherent interfaces like …
Evaluating emerging CXL-enabled memory pooling for HPC systems
J Wahlgren, M Gokhale, IB Peng - 2022 IEEE/ACM Workshop …, 2022 - ieeexplore.ieee.org
Current HPC systems provide memory resources that are statically configured and tightly
coupled with compute nodes. However, workloads on HPC systems are evolving. Diverse …
coupled with compute nodes. However, workloads on HPC systems are evolving. Diverse …
Harnessing integrated cpu-gpu system memory for hpc: a first look into grace hopper
Memory management across discrete CPU and GPU physical memory is traditionally
achieved through explicit GPU allocations and data copy or unified virtual memory. The …
achieved through explicit GPU allocations and data copy or unified virtual memory. The …
{ArchTM}:{Architecture-Aware}, high performance transaction for persistent memory
Failure-atomic transactions are a critical mechanism for accessing and manipulating data on
persistent memory (PM) with crash consistency. We identify that small random writes in …
persistent memory (PM) with crash consistency. We identify that small random writes in …
Athena: High-performance sparse tensor contraction sequence on heterogeneous memory
Sparse tensor contraction sequence has been widely employed in many fields, such as
chemistry and physics. However, how to efficiently implement the sequence faces multiple …
chemistry and physics. However, how to efficiently implement the sequence faces multiple …
Optimizing large-scale plasma simulations on persistent memory-based heterogeneous memory with effective data placement across memory hierarchy
Particle simulations of plasma are important for understanding plasma dynamics in space
weather and fusion devices. However, production simulations that use billions and even …
weather and fusion devices. However, production simulations that use billions and even …
Visual Studio Code in Introductory Computer Science Course: An Experience Report
Involving integrated development environments (IDEs) in introductory-level (CS1)
programming courses is critical. However, it is difficult for instructors to find a suitable IDE …
programming courses is critical. However, it is difficult for instructors to find a suitable IDE …
MaPHeA: A lightweight memory hierarchy-aware profile-guided heap allocation framework
Hardware performance monitoring units (PMUs) are a standard feature in modern
microprocessors for high-performance computing (HPC) and embedded systems, by …
microprocessors for high-performance computing (HPC) and embedded systems, by …
Merchandiser: Data placement on heterogeneous memory for task-parallel hpc applications with load-balance awareness
The emergence of heterogeneous memory (HM) provides a cost-effective and high-
performance solution to memory-consuming HPC applications. Deciding the placement of …
performance solution to memory-consuming HPC applications. Deciding the placement of …
ecoHMEM: Improving object placement methodology for hybrid memory systems in HPC
Recent byte-addressable persistent memory (PMEM) technology offers capacities
comparable to storage devices and access times much closer to DRAMs than other non …
comparable to storage devices and access times much closer to DRAMs than other non …