A survey of aging monitors and reconfiguration techniques
LR Juracy, MT Moreira, AM Amory… - arXiv preprint arXiv …, 2020 - arxiv.org
CMOS technology scaling makes aging effects an important concern for the design and
fabrication of integrated circuits. Aging deterioration reduces the useful life of a circuit …
fabrication of integrated circuits. Aging deterioration reduces the useful life of a circuit …
Selecting representative critical paths for sensor placement provides early FPGA aging information
M Ebrahimi, Z Navabi - … Aided Design of Integrated Circuits and …, 2019 - ieeexplore.ieee.org
This article proposes a methodology for critical path selection and delay sensor insertion for
aging monitoring in field-programmable gate arrays (FPGAs). The aging information can be …
aging monitoring in field-programmable gate arrays (FPGAs). The aging information can be …
纳米级数字集成电路老化效应分析与老化监测技术综述
赵天津， 黄乐天， 谢暄， 魏敬和 - 电子与封装, 2020 - ep.org.cn
? 数字集成电路随着工艺制程的提高, 可靠性问题逐步凸显, 而老化则是可靠性问题的一个重要
方面. 同时由于数字集成电路被广泛地应用于工业, 汽车, 航天等领域, 对可靠性提出更高的要求 …
方面. 同时由于数字集成电路被广泛地应用于工业, 汽车, 航天等领域, 对可靠性提出更高的要求 …
Run-Time Thermal Management for Lifetime Optimization in Low-Power Designs
D Rossi, V Tenentes - Electronics, 2022 - mdpi.com
In this paper, the magnitude of the temperature and stress variability of dynamic voltage and
frequency scaling (DVFS) designs is analyzed, and their impact on the bias temperature …
frequency scaling (DVFS) designs is analyzed, and their impact on the bias temperature …
[PDF][PDF] Run-Time Thermal Management for Lifetime Optimization in Low-Power Designs. Electronics 2022, 11, 411
D Rossi, V Tenentes - 2022 - academia.edu
In this paper, the magnitude of the temperature and stress variability of dynamic voltage and
frequency scaling (DVFS) designs is analyzed, and their impact on the bias temperature …
frequency scaling (DVFS) designs is analyzed, and their impact on the bias temperature …
Workload-Aware Static Aging Monitoring and Mitigation of Timing-Critical Flip-Flops
Unlike dynamic BTI which involves both stress and recovery periods, long periods of
inactivity in parts of the circuit can result in static BTI (S-BTI) stress. This phenomenon can …
inactivity in parts of the circuit can result in static BTI (S-BTI) stress. This phenomenon can …
[PDF][PDF] Runtime Monitoring for Dependable Hardware Design
A Vijayan - 2019 - core.ac.uk
With technology scaling advancement and globalization of integrated circuit (IC)
manufacturing, a host of vulnerabilities affect dependability of computing hardware. Each …
manufacturing, a host of vulnerabilities affect dependability of computing hardware. Each …