Machine learning for agile fpga design
Field-programmable gate arrays (FPGAs) have become popular means of hardware
acceleration since they offer massive parallelism, flexible configurability, and potentially …
acceleration since they offer massive parallelism, flexible configurability, and potentially …
Modular and lean architecture with elasticity for sparse matrix vector multiplication on fpgas
AK Jain, C Ravishankar, H Omidian… - 2023 IEEE 31st …, 2023 - ieeexplore.ieee.org
The use of domain-specific accelerators is becoming prominent for a variety of emerging
domains such as graph analytics and HPC, where most of the computations revolve around …
domains such as graph analytics and HPC, where most of the computations revolve around …
Graphitron: A domain specific language for fpga-based graph processing accelerator generation
FPGA-based graph processing accelerators, enabling extensive customization, have
demonstrated significant energy efficiency over general computing engines like CPUs and …
demonstrated significant energy efficiency over general computing engines like CPUs and …
F-tadoc: Fpga-based text analytics directly on compression with hls
Y Zhou, F Zhang, T Lin, Y Huang… - 2024 IEEE 40th …, 2024 - ieeexplore.ieee.org
With the development of loT and edge computing, data analytics on edge has become
popular, and text analytics directly on compression (TADOC) has been proven to be a …
popular, and text analytics directly on compression (TADOC) has been proven to be a …
GraphScale: Scalable Processing on FPGAs for HBM and Large Graphs
Recent advances in graph processing on FPGAs promise to alleviate performance
bottlenecks with irregular memory access patterns. Such bottlenecks challenge performance …
bottlenecks with irregular memory access patterns. Such bottlenecks challenge performance …
ScalaBFS2: A High-performance BFS Accelerator on an HBM-enhanced FPGA Chip
K Li, S Xu, Z Shao, R Zheng, X Liao, H Jin - ACM Transactions on …, 2024 - dl.acm.org
The introduction of High Bandwidth Memory (HBM) to the FPGA chip makes it possible for
an FPGA-based accelerator to leverage the huge memory bandwidth of HBM to improve its …
an FPGA-based accelerator to leverage the huge memory bandwidth of HBM to improve its …
GraphScale: Scalable bandwidth-efficient graph processing on FPGAs
Recent advances in graph processing on FPGAs promise to alleviate performance
bottlenecks with irregular memory access patterns. Such bottlenecks challenge performance …
bottlenecks with irregular memory access patterns. Such bottlenecks challenge performance …
LightRW: FPGA Accelerated Graph Dynamic Random Walks
Graph dynamic random walks (GDRWs) have recently emerged as a powerful paradigm for
graph analytics and learning applications, including graph embedding and graph neural …
graph analytics and learning applications, including graph embedding and graph neural …
L-FNNG: Accelerating Large-Scale KNN Graph Construction on CPU-FPGA Heterogeneous Platform
C Liu, X Liao, L Zheng, Y Huang, H Liu… - ACM Transactions on …, 2024 - dl.acm.org
Due to the high complexity of constructing exact k-nearest neighbor graphs, approximate
construction has become a popular research topic. The NN-Descent algorithm is one of the …
construction has become a popular research topic. The NN-Descent algorithm is one of the …
GraFlex: Flexible Graph Processing on FPGAs through Customized Scalable Interconnection Network
Graph processing system design has been widely considered to be a challenging topic due
to the mismatch between the computational throughput requirement and the memory …
to the mismatch between the computational throughput requirement and the memory …