In order to scale, future systems will need to dramatically reduce data movement. Data
movement is expensive in current designs because (i) traditional memory hierarchies force …

Current systems hide data movement from software behind the load-store interface.
Software's inability to observe and respond to data movement is the root cause of many …

Memory-intensive operations and their memory access latency are often the performance
bottleneck in parallel applications. In this paper, we investigate the concept of active memory …

Building hardware prototypes for computer architecture research is challenging.
Unfortunately, development of the required software tools (compilers, debuggers, runtime) is …

Current systems hide data movement from software behind the load-store interface.
Softwareā€™ s inability to observe and respond to data movement is the root cause of many …

Computer systems are increasingly burdened by the rising cost of data movement. Moving
data across chip in a modern processor consumes orders-of-magnitude more energy than …

Creating parameterized “chip generators” has been proposed as one way to decrease chip
NRE costs. While many approaches are available for creating or generating flexible data …

The rising cost of data movement poses a significant challenge to future computing systems.
The call to arms for novel data-centric systems has spawned a wave of near-data computing …

The rapid revolution in microprocessor chip architecture due to the many-core technology is
presenting unprecedented challenges to the application developers as well as system …

Sequential electrocardiograms (ECGs) are very useful for personalized diagnosis. It is
therefore very useful to search various electrocardiographs or ECG management systems …