With the development of information technology, the border of the cyberspace gets much
broader and thus also exposes increasingly more vulnerabilities to attackers. Traditional …

Current software attacks often build on exploits that subvert machine-code execution. The
enforcement of a basic safety property, control-flow integrity (CFI), can prevent such attacks …

To improve performance and reduce power, processor designers employ advances that
shrink feature sizes, lower voltage levels, reduce noise margins, and increase clock rates …

In this paper, we revisit the system vulnerability stack for transient faults. We reveal severe
pitfalls in widely used vulnerability measurement approaches, which separate the hardware …

Reliability concerns due to technology scaling have been a major focus of researchers and
designers for several technology nodes. Therefore, many new techniques for enhancing and …

With continued CMOS scaling, future shipped hardware will be increasingly vulnerable to in-
the-field faults. To be broadly deployable, the hardware reliability solution must incur low …

As chip densities and clock rates increase, processors are becoming more susceptible to
transient faults that can affect program correctness. Up to now, system designers have …

Technological scaling has increased the susceptibility of logic circuits to radiation-induced
transient faults, making digital devices less reliable. Although different techniques have …

Traditional fault-tolerance techniques typically utilize resources ineffectively because they
cannot adapt to the changing reliability and performance demands of a system. This paper …

In the near future, hardware is expected to become increasingly vulnerable to faults due to
continuously decreasing feature size. Software-level symptoms have previously been used …