The last cpu

J Nider, A Fedorova - Proceedings of the Workshop on Hot Topics in …, 2021 - dl.acm.org
Since the end of Dennard scaling and Moore's Law have been foreseen, specialized
hardware has become the focus for continued scaling of application performance …

An efficient shortest path algorithm for content-based routing on 2-D mesh accelerator networks

J Liu, H Gu, W Wei, Z Chen, Y Chen - Future Generation Computer Systems, 2021 - Elsevier
Reconfigurable units such as Field Programmable Gate Arrays (FPGAs) have been used
widely as high-performance hardware accelerators for a variety of applications and offer a …

Hardware accelerator design for data centers

S Yesil, MM Ozdal, T Kim, A Ayupov… - 2015 IEEE/ACM …, 2015 - ieeexplore.ieee.org
As the size of available data is increasing, it is becoming inefficient to scale the
computational power of traditional systems. To overcome this problem, customized …

Accelerating OLAP workload on interconnected FPGAs with flash storage

M Yoshimi, R Kudo, Y Oge, Y Terada… - … on Computing and …, 2014 - ieeexplore.ieee.org
The data volume used in online analytical processing (OLAP) applications is rapidly
increasing because of the increasing popularity of various Web services and emerging …

Pipelined parallel join and its FPGA-based acceleration

M Yoshimi, Y Oge, T Yoshinaga - ACM Transactions on Reconfigurable …, 2017 - dl.acm.org
A huge amount of data is being generated and accumulated in data centers, which leads to
an important increase in the required energy consumption to analyze these data. Thus, we …

Optimal routing in multihop packet radio networks

RL Hamilton, HC Yu - IEEE INFOCOM'90, 1990 - computer.org
This paper introduces an FPGA-based scheme to accelerate mpiBLAST, which is a parallel
sequence alignment algorithm for computational biology. Recent rapidly growing biological …

Nanostreams: A microserver architecture for real-time analytics on fast data streams

UI Minhas, M Russell, S Kaloutsakis… - … on Multi-Scale …, 2017 - ieeexplore.ieee.org
Ever increasing power consumption has created great interest in energy-efficient
microserver architectures but they lack the computational, networking, and storage power …

Accelerating BLAST Computation on an FPGA-enhanced PC Cluster

M Yoshimi, C Wu, T Yoshinaga - 2016 Fourth International …, 2016 - ieeexplore.ieee.org
This paper introduces an FPGA-based scheme to accelerate mpiBLAST, which is a parallel
sequence alignment algorithm for computational biology. Recent rapidly growing biological …

Performance and energy efficiency analysis of reverse time migration on a FPGA platform

JC Bittencourt, JR Oliveira… - 2019 IEEE/ACM …, 2019 - ieeexplore.ieee.org
Reverse time migration (RTM) modeling is a computationally intensive component in the
seismic processing workflow of oil and gas exploration, often demanding the manipulation of …

[PDF][PDF] Energy-efficient many-core overlay architecture for reconfigurable chips

RB Abdelhamid - 2023 - tsukuba.repo.nii.ac.jp
Since the invention of the first programmable CPU (Central Processing Unit), the need for
more capable computing machines has been growing by leaps and bounds. This has …