Scaling up silicon photonic-based accelerators: Challenges and opportunities
Digital accelerators in the latest generation of complementary metal–oxide–semiconductor
processes support, multiply, and accumulate (MAC) operations at energy efficiencies …
processes support, multiply, and accumulate (MAC) operations at energy efficiencies …
Analog-to-digital converter-based serial links: An overview
The ever-increasing number of networked devices and cloud computing applications has
created dramatic growth in data center traffic. This necessitates that the serial links that …
created dramatic growth in data center traffic. This necessitates that the serial links that …
A 40-to-56 Gb/s PAM-4 receiver with ten-tap direct decision-feedback equalization in 16-nm FinFET
J Im, D Freitas, AB Roldan, R Casey… - IEEE Journal of Solid …, 2017 - ieeexplore.ieee.org
A 40-56 Gb/s PAM-4 receiver with ten-tap decision-feedback equalization (DFE) targeting
chip-to-module and board-to-board cable interconnects is designed in 16-nm FinFET. The …
chip-to-module and board-to-board cable interconnects is designed in 16-nm FinFET. The …
112-Gb/s PAM4 ADC-based SERDES receiver with resonant AFE for long-reach channels
Y Krupnik, Y Perelman, I Levin… - IEEE Journal of Solid …, 2020 - ieeexplore.ieee.org
A 112-Gb/s PAM4 analog-to-digital converter (ADC)-based serializer/de-serializer
transceiver (SERDES) receiver is implemented on Intel's 10-nm FinFET process. The …
transceiver (SERDES) receiver is implemented on Intel's 10-nm FinFET process. The …
A reconfigurable 16/32 Gb/s dual-mode NRZ/PAM4 SerDes in 65-nm CMOS
A Roshan-Zamir, O Elhadidy, HW Yang… - IEEE Journal of Solid …, 2017 - ieeexplore.ieee.org
While four-level pulse amplitude modulation (PAM4) standards are emerging to increase
bandwidth density, the majority of standards use simple binary non-returnto-zero (NRZ) …
bandwidth density, the majority of standards use simple binary non-returnto-zero (NRZ) …
A 56-Gb/s PAM4 receiver with low-overhead techniques for threshold and edge-based DFE FIR-and IIR-tap adaptation in 65-nm CMOS
A Roshan-Zamir, T Iwai, YH Fan… - IEEE Journal of Solid …, 2018 - ieeexplore.ieee.org
This paper presents a four-level pulse amplitude modulation (PAM4) quarter-rate receiver
that efficiently compensates for moderate channel loss in a robust manner through …
that efficiently compensates for moderate channel loss in a robust manner through …
A 112 Gb/s PAM-4 56 Gb/s NRZ reconfigurable transmitter with three-tap FFE in 10-nm FinFET
J Kim, A Balankutty, RK Dokania… - IEEE Journal of Solid …, 2018 - ieeexplore.ieee.org
This paper presents a reconfigurable 56 GS/s transmitter (TX) that operates up to 112 Gb/s
with four-level pulse-amplitude modulation (PAM-4) and at 56 Gb/s with non-return-to-zero …
with four-level pulse-amplitude modulation (PAM-4) and at 56 Gb/s with non-return-to-zero …
A foreground calibration for M-channel time-interleaved analog-to-digital converters based on genetic algorithm
YA Tavares, M Lee - … Transactions on Circuits and Systems I …, 2021 - ieeexplore.ieee.org
The time-interleaved analog-to-digital converter has shown to be a key component of the
latest ultra-wide band systems. Unfortunately, the sub-analog-to-digital converters are prone …
latest ultra-wide band systems. Unfortunately, the sub-analog-to-digital converters are prone …
A fully adaptive 19-to-56Gb/s PAM-4 wireline transceiver with a configurable ADC in 16nm FinFET
P Upadhyaya, CF Poon, SW Lim, J Cho… - … Solid-State Circuits …, 2018 - ieeexplore.ieee.org
Trends in IoT and cloud computing continue to accelerate bandwidth demand, requiring
technology innovation to cover 50G, 100G and 400G ports without significant increase in …
technology innovation to cover 50G, 100G and 400G ports without significant increase in …
A 64-Gb/s 4-PAM transceiver utilizing an adaptive threshold ADC in 16-nm FinFET
L Wang, Y Fu, MA LaCroix, E Chong… - IEEE Journal of Solid …, 2018 - ieeexplore.ieee.org
A 64-Gb/s 4-pulse-amplitude modulation (PAM) transceiver fabricated with a 16-nm fin field
effect transistor (FinFET) technology is presented with a power consumption that scales with …
effect transistor (FinFET) technology is presented with a power consumption that scales with …