Fully depleted silicon on insulator devices CMOS: The 28-nm node is the perfect technology for analog, RF, mmW, and mixed-signal system-on-chip integration

A Cathelin - IEEE Solid-State Circuits Magazine, 2017 - ieeexplore.ieee.org
The race on the Complementary Metal-Oxide-Semiconductor (CMOS) More Moore
integration scale has brought to light several major limitations for efficient planar process …

True-time-delay beamforming receiver with RF re-sampling

K Spoof, V Unnikrishnan, M Zahra… - … on Circuits and …, 2020 - ieeexplore.ieee.org
Analog domain true-time-delays (TTD) are desired in hybrid beamforming receivers with
large relative bandwidths to mitigate the problem of beam squint. We propose a true-time …

Enabling low-power signature recognition for the iot with slif neurons

G Marthe, C Goursaud, L Clavier - 2024 32nd European Signal …, 2024 - ieeexplore.ieee.org
Energy constraints are still a significant challenge in numerous IoT applications, particularly
due to the excessive power consumption of microcontrollers. To overcome this limitation …

Industrial approach to quantum dots in fully-depleted silicon-on-insulator devices for quantum information applications

I Kriekouki - 2022 - theses.hal.science
Electron spin qubits based on quantum dots implemented using advanced Complementary
Metal-Oxide-Semiconductor (CMOS) technology functional at cryogenic temperatures …

40 GHz VCO and Frequency Divider in 28 nm FD-SOI CMOS Technology for Automotive Radar Sensors

G Maiellaro, G Caruso, S Scaccianoce, M Giacomini… - Electronics, 2021 - mdpi.com
This paper presents a 40 GHz voltage-controlled oscillator (VCO) and frequency divider
chain fabricated in STMicroelectronics 28 nm ultrathin body and box (UTBB) fully depleted …

A two-stage slicer employing body biasing for 64-Gb/s PAM4 wireline receiver in 22-nm FDSOI technology

A He, B Li, J Li, X Zhao, J Guo, J Wang, X Zeng… - Microelectronics …, 2024 - Elsevier
A 64 G bps 4-level pulse amplitude modulation (PAM4) mixed-signal receiver incorporating
a decision-feedback equalizer (DFE) for application in wireline communication is …

A harmonic cancellation-based high-frequency on-chip sinusoidal signal generator with calibration using a coarse-fine delay cell

A Mamgain, S Mir, JN Tripathi… - 2023 IEEE International …, 2023 - ieeexplore.ieee.org
An on-chip high-frequency sinusoidal signal generator with a calibration circuit based on a
coarse-fine delay cell is presented in this work. The proposed signal generator is based on …

A wide tuning range delay element for event-driven processing of low-frequency signals in 28-nm FD-SOI CMOS

A González, A Frappé, B Larras… - IEEE Solid-State …, 2020 - ieeexplore.ieee.org
This letter presents a widely tunable digital delay element suitable for low-power low-
frequency continuous-time digital signal processing systems. The design uses features of …

A self-referenced on-chip jitter BIST with sub-picosecond resolution in 28 nm FD-SOI technology

M Madhvaraj, S Mir, MJ Barragan - 2022 IFIP/IEEE 30th …, 2022 - ieeexplore.ieee.org
This paper describes an on-chip instrument for the estimation of absolute and period
random jitter of clock signals in the GHz range with a sub-picosecond resolution. A self …

Properties and design of cmos thyristor delay elements

IC Fernandez, MT de Leon, A Alvarez… - Journal of Integrated …, 2022 - jics.org.br
The CMOS thyristor delay element and its basic operation are presented in this paper. Six
variations of the thyristor design developed over the years to extend the delay length, to …