Emerging STT-MRAM circuit and architecture co-design in 45nm technology

LK Vemula, NM Hossain… - 2017 IEEE 60th …, 2017 - ieeexplore.ieee.org
The spin transfer torque magnetic random access (STT-MRAM) is suitable for embedded
memories and also for the second level cache memory in the mobile CPU's. The most …

Error free sense amplifier circuit design for STT-MRAM nonvolatile memory

LK Vemula, NM Hossain… - 2017 IEEE 60th …, 2017 - ieeexplore.ieee.org
The spin transfer torque magnetic random access (STT-MRAM) is suitable for embedded
memories and also for the second level cache memory in the mobile CPU's. The most …

Continuing the Scaling of Digital Computing Post Moore's Law

G Michelogiannakis, J Shalf, D Donofrio, J Bachan - 2016 - escholarship.org
The approaching end of traditional CMOS technology scaling that up until now followed
Moore's law is coming to an end in the next decade. However, the DOE has come to depend …

[图书][B] Nanoscale nonvolatile memory circuit design using emerging spin transfer torque magnetic random access memory

LK Vemula - 2016 - search.proquest.com
The spin transfer torque magnetic random access memory (STT-MRAM) is suitable for
embedded and second level cache memories in the mobile CPUs. STT-MRAM is a highly …

Effect of Diffused Hydrogen on the Conductance of Fe/Mgo/Fe Magnetic Tunnel Junctions: Atomistic Simulation

B Ghosh - arXiv preprint arXiv:1408.3199, 2014 - arxiv.org
In this work we have analysed the deterimental effect on conductance caused by diffusion of
hydrogen atoms in interstitial voids during fabrication process of magnesium oxide barrier of …

Applications des technologies mémoires MRAM appliquées aux processeurs embarqués

LV Cargnini - 2013 - theses.hal.science
Le secteur Semi-conducteurs avec l'avènement de fabrication submicroniques coule
dessous de 45 nm ont commencé à relever de nouveaux défis pour continuer à évoluer en …