Methods for fault tolerance in networks-on-chip

M Radetzki, C Feng, X Zhao, A Jantsch - ACM Computing Surveys …, 2013 - dl.acm.org
Networks-on-Chip constitute the interconnection architecture of future, massively parallel
multiprocessors that assemble hundreds to thousands of processing cores on a single chip …

NoC routing protocols–objective-based classification

AB Gabis, M Koudil - Journal of Systems Architecture, 2016 - Elsevier
Abstract NoCs (Network on Chips) are the most popular interconnection mechanism used
for systems that require flexibility, extensibility and low power consumption. However …

[图书][B] Network on chip routing algorithms

V Rantala, T Lehtonen, J Plosila - 2006 - Citeseer
Abstract Network on Chip (NoC) is a new paradigm to make the interconnections inside a
System on Chip (SoC) system. In traditional solutions interconnections are realized using a …

Networks on chips: scalable interconnects for future systems on chips

M Ali, M Welzl, M Zwicknagl - 2008 4th European Conference …, 2008 - ieeexplore.ieee.org
According to the International Technology Roadmap for Semiconductors (ITRS), before the
end of this decade we will be entering the era of a billion transistors on a single chip. It is …

Using the NS-2 network simulator for evaluating network on chips (NoC)

M Ali, M Welzl, A Adnan… - … Conference on Emerging …, 2006 - ieeexplore.ieee.org
Networks on chips (NoCs) have been introduced as a remedy for the growing problems of
current interconnects in VLSI chips. Being a relatively new domain in research, simulation …

A complete self-testing and self-configuring NoC infrastructure for cost-effective MPSoCs

A Ghiribaldi, D Ludovici, F Trivino, A Strano… - ACM Transactions on …, 2013 - dl.acm.org
Networks-on-chip need to survive to manufacturing faults in order to sustain yield. An
effective testing and configuration strategy however implies two opposite requirements. One …

Synthesis of low-overhead configurable source routing tables for network interfaces

I Loi, F Angiolini, L Benini - 2009 Design, Automation & Test in …, 2009 - ieeexplore.ieee.org
In on-chip multiprocessor communication, link failures and dynamically changing application
scenarios represent demanding constraints for the provision of suitable Quality of Service …

Intelligent On/Off Dynamic Link Management for On‐Chip Networks

AG Savva, T Theocharides… - Journal of Electrical and …, 2012 - Wiley Online Library
Networks‐on‐chips (NoCs) provide scalable on‐chip communication and are expected to
be the dominant interconnection architectures in multicore and manycore systems. Power …

Investigation of transient fault effects in an asynchronous NoC router

PM Yaghini, A Eghbal, H Pedram… - 2010 18th Euromicro …, 2010 - ieeexplore.ieee.org
This paper presents Investigation of Transient Fault Effects in an asynchronous NoC router.
The experiment is based on simulation-based fault injection method to assess the fault …

Fault-tolerant routing algorithm for network-on-chip based on dynamic XY routing

X Li, Y Cao, L Wang, T Cai - Wuhan University Journal of Natural Sciences, 2009 - Springer
In order to ensure the reliability of network-on-chip (NoC) under faulty circumstance, a
dynamic fault tolerant routing algorithm is proposed. This algorithm can implement detour …