Controllable adjustment of Ta and Cu material removal rate in TSV tantalum-based barrier layer planarization process

Z Du, R Wang, B Liu, T Zheng, Y Dong, X Chen… - Journal of Materials …, 2024 - Springer
Abstract Through Silicon Via (TSV), a kind of 3D packaging technique, can improve chip
integration based on “More than Moore” scheme. The larger copper area ratio at the TSV …

Designing process and analysis of a new SOI-MESFET structure with enhanced DC and RF characteristics for high-frequency and high-power applications

A Ghiasi, L Nkenyereye, F Hazzazi, MA Chaudhary… - Plos one, 2024 - journals.plos.org
This research introduces a new designing process and analysis of an innovative Silicon-on-
Insulator Metal-Semiconductor Field-Effect (SOI MESFET) structure that demonstrates …

Structures, Electric Properties and STM Images of GeSe Monolayers Doped by Group IV–VI Atoms: A First-Principles Study

H Ni, Y Hu, G Zhou, C Mao, Z Chen, Q He, L Qian - Crystals, 2023 - mdpi.com
Doping is an important method to modulate the physical and chemical properties of two-
dimensional materials. By substitutional doping, different group IV–VI atoms are doped in …

All-optically controlled topological current switcher based on silicene-like nanoribbons

YL Sun, H Xie, JE Yang, XQ Hu… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
Low-dimensional topological insulator materials, such as silicene-like 2-D materials, have
wide applications in electronic, spintronic, and optoelectronic nanodevice, by utilizing their …