Visualization of VHDL-based simulations as a pedagogical tool for supporting computer science education

GR Garay, A Tchernykh, AY Drozdov… - Journal of …, 2019 - Elsevier
Communication between information processing systems becomes a challenge, especially
in the “big data” era. It is a mandatory subject in the topic “Architecture and organization” of …

One-IPC high-level simulation of microthreaded many-core architectures

I Uddin - The International Journal of High Performance …, 2017 - journals.sagepub.com
The microthreaded many-core architecture is comprised of multiple clusters of fine-grained
multi-threaded cores. The management of concurrency is supported in the instruction set …

High-level simulation of concurrency operations in microthreaded many-core architectures

I Uddin - GSTF Journal on Computing (JoC), 2015 - Springer
Computer architects are always interested in analyzing the complex interactions amongst
the dynamically allocated resources. Generally a detailed simulator with a cycle-accurate …

[HTML][HTML] Multiple levels of abstraction in the simulation of microthreaded many-core architectures

I Uddin - Open Journal of Modelling and Simulation, 2015 - scirp.org
Simulators are generally used during the design of computer architectures. Typically,
different simulators with different levels of complexity, speed and accuracy are used …

Cache-based high-level simulation of microthreaded many-core architectures

I Uddin, R Poss, C Jesshope - Journal of Systems Architecture, 2014 - Elsevier
The accuracy of simulated cycles in high-level simulators is generally less than the accuracy
in detailed simulators for a single-core systems, because high-level simulators simulate the …

Apple-CORE: harnessing general-purpose many-cores with hardware concurrency management

R Poss, M Lankamp, Q Yang, J Fu, MW van Tol… - Microprocessors and …, 2013 - Elsevier
To harness the potential of CMPs for scalable, energy-efficient performance in general-
purpose computers, the Apple-CORE project has co-designed a general machine model …

Analytical-based high-level simulation of the microthreaded many-core architectures

I Uddin, R Poss, C Jesshope - 2014 22nd Euromicro …, 2014 - ieeexplore.ieee.org
High-level simulation is becoming commonly used for design space exploration of many-
core systems. We have been working on high-level simulation techniques for the …

Signature-based high-level simulation of microthreaded many-core architectures

I Uddin, R Poss, C Jesshope - 2014 4th International …, 2014 - ieeexplore.ieee.org
The simulation of fine-grained latency tolerance based on the dynamic state of the system in
high-level simulation of many-core systems is a challenging simulation problem. We have …

Performance optimization mechanisms for fault-resilient VLIW processors

R Psiakis - 2018 - inria.hal.science
Embedded processors in critical domains require a combination of reliability, performance
and low energy consumption. Very Long Instruction Word (VLIW) processors provide …

Microgrid-The microthreaded many-core architecture

I Uddin - arXiv preprint arXiv:1309.5507, 2013 - arxiv.org
Traditional processors use the von Neumann execution model, some other processors in the
past have used the dataflow execution model. A combination of von Neuman model and …