N-polar GaN epitaxy and high electron mobility transistors
This paper reviews the progress of N-polar ($000\mathop 1\limits^\_ $) GaN high frequency
electronics that aims at addressing the device scaling challenges faced by GaN high …
electronics that aims at addressing the device scaling challenges faced by GaN high …
Germanium based field-effect transistors: Challenges and opportunities
The performance of strained silicon (Si) as the channel material for today's metal-oxide-
semiconductor field-effect transistors may be reaching a plateau. New channel materials …
semiconductor field-effect transistors may be reaching a plateau. New channel materials …
Comparison of methods to quantify interface trap densities at dielectric/III-V semiconductor interfaces
R Engel-Herbert, Y Hwang, S Stemmer - Journal of applied physics, 2010 - pubs.aip.org
Methods to extract trap densities at high-permittivity (k) dielectric/III-V semiconductor
interfaces and their distribution in the semiconductor band gap are compared. The …
interfaces and their distribution in the semiconductor band gap are compared. The …
A review of InP/InAlAs/InGaAs based transistors for high frequency applications
This paper presents an overview of the rapid progress being made in the development of
InP based devices for high speed applications. Over the past few decades, major aero …
InP based devices for high speed applications. Over the past few decades, major aero …
Design of tunneling field-effect transistors based on staggered heterojunctions for ultralow-power applications
This letter presents the design of a tunneling FET with III-V-based tunnel heterojunctions for
operation in digital circuits with supply voltages as low as 0.3 V. A representative …
operation in digital circuits with supply voltages as low as 0.3 V. A representative …
Analysis of nanometer-scale InGaAs/InAs/InGaAs composite channel MOSFETs using high-K dielectrics for high speed applications
The outstanding electron transport properties of InGaAs and InAs semiconductor materials,
makes them attractive candidates for future nano-scale CMOS. In this paper, the ON state …
makes them attractive candidates for future nano-scale CMOS. In this paper, the ON state …
Benchmarking of III–V n-MOSFET maturity and feasibility for future CMOS
G Doornbos, M Passlack - IEEE electron device letters, 2010 - ieeexplore.ieee.org
With the consideration of III-V channels for future CMOS, an urgent need for standard metrics
to assess the maturity of III-V MOSFETs and to investigate their suitability for future CMOS …
to assess the maturity of III-V MOSFETs and to investigate their suitability for future CMOS …
High transconductance self-aligned gate-last surface channel In0.53Ga0.47As MOSFET
In this paper we present a 55 nm gate length In 0.53 Ga 0.47 As MOSFET with extrinsic
transconductance of 1.9 mS/μm and on-resistance of 199 Ωμm. The self-aligned MOSFET is …
transconductance of 1.9 mS/μm and on-resistance of 199 Ωμm. The self-aligned MOSFET is …
Effects of (NH4) 2S passivation on the off-state performance of 3-dimensional InGaAs metal-oxide-semiconductor field-effect transistors
Planar and 3-dimensional (3D) buried-channel InGaAs metal-oxide-semiconductor field-
effect transistors (MOSFETs) have been experimentally demonstrated at deep-submicron …
effect transistors (MOSFETs) have been experimentally demonstrated at deep-submicron …
Enhancement-mode N-polar GaN MISFETs with self-aligned source/drain regrowth
We report gate-first enhancement-mode (E-mode) N-polar GaN MISFET devices with self-
aligned source/drain regions by molecular beam epitaxy regrowth and with a SiN x gate …
aligned source/drain regions by molecular beam epitaxy regrowth and with a SiN x gate …