A survey of neuromorphic computing and neural networks in hardware

CD Schuman, TE Potok, RM Patton, JD Birdwell… - arXiv preprint arXiv …, 2017 - arxiv.org
Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices,
and models that contrast the pervasive von Neumann computer architecture. This …

[图书][B] Reconfigurable computing: the theory and practice of FPGA-based computation

S Hauck, A DeHon - 2010 - books.google.com
Reconfigurable Computing marks a revolutionary and hot topic that bridges the gap
between the separate worlds of hardware and software design—the key feature of …

Instruction-level parallelism for reconfigurable computing

TJ Callahan, J Wawrzynek - FPL, 1998 - books.google.com
Reconfigurable coprocessors can exploit large degrees of instruction-level parallelism (ILP).
In compiling sequential code for reconfigurable coprocessors, we have found it convenient …

The roles of FPGAs in reprogrammable systems

S Hauck - Proceedings of the IEEE, 1998 - ieeexplore.ieee.org
Reprogrammable systems based on field programmable gate arrays are revolutionizing
some forms of computation and digital logic. As a logic emulation system, they provide …

Reconfigurable architectures for general-purpose computing

A DeHon - 1996 - dspace.mit.edu
General-purpose computing devices allow us to (1) customize computation after fabrication
and (2) conserve area by reusing expensive active circuitry for different functions in time. We …

FPGA implementations of neural networks–a survey of a decade of progress

J Zhu, P Sutton - Field Programmable Logic and Application: 13th …, 2003 - Springer
The ferst successful FPGA implementation [1] of artificial neural networks (ANNs) was
published a little over a decade ago. It is timely to review the progress that has been made in …

A dynamic instruction set computer

MJ Wirthlin, BL Hutchings - Proceedings IEEE Symposium on …, 1995 - ieeexplore.ieee.org
A dynamic instruction set computer (DISC) has been developed that supports demand-
driven modification of its instruction set. Implemented with partially reconfigurable FPGAs …

A phylogenetic, ontogenetic, and epigenetic view of bio-inspired hardware systems

M Sipper, E Sanchez, D Mange… - IEEE Transactions …, 1997 - ieeexplore.ieee.org
If one considers life on Earth since its very beginning, three levels of organization can be
distinguished: the phylogenetic level concerns the temporal evolution of the genetic …

Challenges for large-scale implementations of spiking neural networks on FPGAs

LP Maguire, TM McGinnity, B Glackin, A Ghani… - Neurocomputing, 2007 - Elsevier
The last 50 years has witnessed considerable research in the area of neural networks
resulting in a range of architectures, learning algorithms and demonstrative applications. A …

The impact of arithmetic representation on implementing MLP-BP on FPGAs: A study

AW Savich, M Moussa, S Areibi - IEEE transactions on neural …, 2007 - ieeexplore.ieee.org
In this paper, arithmetic representations for implementing multilayer perceptrons trained
using the error backpropagation algorithm (MLP-BP) neural networks on field …