NBTI Effect Survey for Low Power Systems in Ultra-Nanoregime

Kajal, VK Sharma - Current Nanoscience, 2024 - benthamdirect.com
Background: Electronic device scaling with the advancement of technology nodes maintains
the performance of the logic circuits with area benefit. Metal oxide semiconductor (MOS) …

Design and Simulation for NBTI Aware Logic Gates

Kajal, VK Sharma - Wireless Personal Communications, 2021 - Springer
Reliability of the electronic circuits is one of the most prominent factor in the development of
very large-scale integration (VLSI) industry. Huge demand for compact size and high …

An Investigation for the Negative-Bias Temperature Instability Aware CMOS Logic

Kajal, VK Sharma - Micro and Nanosystems, 2021 - benthamdirect.com
Background: Scaling of the dimensions of semiconductor device plays a very important role
in the advancement of Very Large-Scale Integration (VLSI) technology. There are many …

[PDF][PDF] 通过主动加速恢复延长芯片寿命: 机遇与挑战

郭鑫斐 - 电子与信息学报, 2023 - jeit.ac.cn
新型工艺下芯片集成度的提高和尺寸的缩小导致了器件内部电场和电流密度的不断增加,
使得老化问题日趋严重, 当前针对老化主要的防护思路依然是采取保护带和预留时序裕量的方式 …

NBTI and power reduction using a workload-aware supply voltage assignment approach

Y Yu, J Liang, Z Yang, X Peng - Journal of Electronic Testing, 2018 - Springer
Supply voltage assignment (SVA) can alleviate the performance aging induced by the
negative bias temperature instability (NBTI) effect. However, due to the random …

GNN-Based INC and IVC Co-Optimization for Aging Mitigation

YG Chen, HY Yang, C Lin - 2024 IEEE European Test …, 2024 - ieeexplore.ieee.org
As semiconductor processes advance, circuit aging becomes prominent. One of the most
severe aging effects is Negative Bias Temperature Instability (NBTI), which increases the …

Active Accelerated Recovery for Extended Chip Lifetime: Opportunities and Challenges

X GUO - 电子与信息学报, 2023 - jeit.ac.cn
The higher level of integration and smaller feature size in advanced technology nodes have
led to increased electrical field and current density, which worsen further the chip aging …