Method for high performance standard cell design techniques in finFET based library using local layout effects (LLE)

S Agarwal, A Ghosh, PK Rana - US Patent 10,103,172, 2018 - Google Patents
Inventive concepts describe a method for high performance standard cell design techniques
in FinFET based library using LLE. Inventive concepts describe a fabrication pro cess using …

Method and device for incorporating single diffusion break into nanochannel structures of FET devices

J Smith, A Devilliers - US Patent 10,734,224, 2020 - Google Patents
A method of forming a semiconductor device includes providing a starting structure including
a substrate having thereon a plurality of gate regions alternately arranged with a plurality of …

Semiconductor devices and methods for manufacturing the same

MC Oh, S Park - US Patent 10,115,722, 2018 - Google Patents
ABSTRACT A semiconductor device and a method for manufacturing the same are
disclosed. The method comprises forming active patterns on a substrate that includes first …

Scalable architecture for analog matrix operations with resistive devices

T Gokmen, S Kim - US Patent 10,599,744, 2020 - Google Patents
In some aspects, a method for performing analog matrix inversion on a matrix with a network
of resistive device arrays B, W, Q, and C is described. The method may include initializing …

Diffusion break forming after source/drain forming and related IC structure

GR Mulfinger, JZ Wallner - US Patent 9,917,103, 2018 - Google Patents
Methods of forming a diffusion break are disclosed. The method includes forming a diffusion
break after source/drain formation, by removing a gate stack of the dummy gate to a buried …

Six-track standard cell libraries with fin depopulation, contact over active gate, and narrower diffusion break in 7nm technology

TH Wang, CC Hsu, L Kao, BY Li, TC Wu… - … on Quality Electronic …, 2021 - ieeexplore.ieee.org
In this article we present three 6-track standard cell libraries based on ASAP7 PDK which is
extended to include three technologies, contacts over active gates (COAG), fin depopulation …

Double diffusion break gate structure without vestigial antenna capacitance

A Reznicek, S Kanakasabapathy - US Patent 10,083,964, 2018 - Google Patents
(57) ABSTRACT A double diffusion break (DDB) gate structure is provided by removing the
vestigial antenna to provide a space and the space is filled, at least in part, with an interlevel …

Improving Pin Accessibility of Standard Cell Libraries in 7nm Technology

TH Peng, CC Hsu, PC Wang… - 2022 23rd International …, 2022 - ieeexplore.ieee.org
In this paper we present several approaches to improving pin accessibility of standard cells
designed with ASAP7 PDK. These approaches are refining pin layout, using double-row …

Semiconductor device

CS Yoon, BW Jeong - US Patent 10,741,659, 2020 - Google Patents
A semiconductor device comprising a first field insulating film around at least a part of a first
fin type pattern and at least a part of a second fin type pattern, a second field insulating film …

Circuits employing a double diffusion break (DDB) and single diffusion break (SDB) in different type diffusion region (s), and related fabrication methods

H Yang - US Patent 10,622,479, 2020 - Google Patents
Aspects disclosed herein include circuits employing a double diffusion break (DDB) and a
single diffusion break (SDB) in different type diffusion regions, and related fabri cation …