Precise weight tuning in quantum dot-based resistive-switching memory for neuromorphic systems
In this study, nonvolatile bipolar resistive switching and synaptic emulation behaviors are
performed in an InGaP quantum dots (QDs)/HfO2-based memristor device. First, the physical …
performed in an InGaP quantum dots (QDs)/HfO2-based memristor device. First, the physical …
Dynamic memristor array with multiple reservoir states for training efficient neuromorphic computing
M Noh, D Ju, S Kim - Journal of Materials Chemistry C, 2024 - pubs.rsc.org
In this study, we evaluated the performance of a Pt/Al/TiOy/TiOx/Al2O3/Pt RRAM array
device in synaptic and reservoir computing applications. The device exhibited excellent …
device in synaptic and reservoir computing applications. The device exhibited excellent …
True random number generator using stochastic noise signal of memristor with variation tolerance
Memristors are suitable for internet of things (IoT) edge devices due to their high scalability
and low power consumption. Also, their stochastic noise signals can be used to produce …
and low power consumption. Also, their stochastic noise signals can be used to produce …
Optimizing hardware-software co-design based on non-ideality in memristor crossbars for in-memory computing
P Jiang, D Song, M Huang, F Yang, L Wang… - Science China …, 2025 - Springer
The memristor crossbar, with its exceptionally high storage density and parallelism, enables
efficient vector matrix multiplication (VMM), significantly improving data throughput and …
efficient vector matrix multiplication (VMM), significantly improving data throughput and …
Neuron Circuit Based on a Split-gate Transistor with Nonvolatile Memory for Homeostatic Functions of Biological Neurons
To mimic the homeostatic functionality of biological neurons, a split-gate field-effect
transistor (SG FET) with a charge trap layer is proposed within a neuron circuit. By adjusting …
transistor (SG FET) with a charge trap layer is proposed within a neuron circuit. By adjusting …
Coupling-Free Readout Scheme for Memcapacitors With NAND Flash Structure
In this article, we propose a coupling-free readout scheme designed for a hardware neural
network employing memcapacitive devices based on Si MOS capacitors having a charging …
network employing memcapacitive devices based on Si MOS capacitors having a charging …
Uncontrolled learning: co-design of neuromorphic hardware topology for neuromorphic algorithms
F Barrows, J Lin, F Caravelli, DR Chialvo - arXiv preprint arXiv:2408.05183, 2024 - arxiv.org
Hardware-based neuromorphic computing remains an elusive goal with the potential to
profoundly impact future technologies and deepen our understanding of emergent …
profoundly impact future technologies and deepen our understanding of emergent …
A Novel Verification Method of Minimizing Verification Error in AND-type Flash Arrays
A novel verification method for accurate neuromorphic systems is proposed. First, the origin
of verification errors is investigated, pinpointing the off-current and the discrepancy between …
of verification errors is investigated, pinpointing the off-current and the discrepancy between …
First Realization of Batch Normalization in Flash-Based Binary Neural Networks Using a Single Voltage Shifter
S Hwang, W Lee, JW Park, D Suh - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
Batch normalization (BN) is a technique used to enhance training speed and generalization
performance by mitigating internal covariate shifts. However, implementing BN in hardware …
performance by mitigating internal covariate shifts. However, implementing BN in hardware …
[HTML][HTML] Neuromorphic Computing: Cutting-Edge Advances and Future Directions
Neuromorphic computing draws motivation from the human brain and presents a distinctive
substitute for the traditional von Neumann architecture. Neuromorphic systems provide …
substitute for the traditional von Neumann architecture. Neuromorphic systems provide …