MPSoC design and implementation using microblaze soft core processor architecture for faster execution of arithmetic application

PS Titare, DG Khairnar - International Journal of High …, 2023 - inderscienceonline.com
The research paper presents the design methodology with novel task distribution technique
on multi-processor system on chip (MPSoC) for speeding up the execution of arithmetic …

Multilayer bus optimization for real-time embedded systems

PC Hsiu, CK Hsieh, DN Lee… - IEEE Transactions on …, 2011 - ieeexplore.ieee.org
A major challenge in the design of multicore embedded systems is how to tackle the
communications among tasks with performance requirements and precedence constraints …

Multi-layer bus minimization for SoC

YS Chen, HL Tsai, SW Lo - Journal of Systems and Software, 2010 - Elsevier
The deployment of multiple processing elements such as a microprocessor or a Digital
Signal Processor in embedded systems often results in significant communication …

資料傳輸排程之能耗與成本最佳化

修丕承 - 2009 - tdr.lib.ntu.edu.tw
過去十年, 高能效與低成本一直是消費性電子產品設計上相當熱門的議題. 有鑑於裝置之間以及
裝置內部資料傳輸的快速成長, 本論文針對可攜式裝置的傳輸元件進行能耗與成本最佳化之研究 …

Multi-layer bus optimization for real-time task scheduling with chain-based precedence constraints

PC Hsiu, DN Lee, TW Kuo - 2009 30th IEEE Real-Time …, 2009 - ieeexplore.ieee.org
One major challenging issue in the designs of multi-core embedded systems is to tackle the
communication problem among tasks with performance requirements and precedence …

CDMA based interconnect mechanism for SOPC

V Rajesh, PV Kumar - arXiv preprint arXiv:1205.4487, 2012 - arxiv.org
The Network-on-chip (NoC) designs consisting of large pack of Intellectual Property (IP)
blocks (cores) on the same silicon die is becoming technically possible nowadays. But, the …

Réseau sur puce sans buffer pour les applications de codage vidéo: étude de cas H. 264/AVC

H Mayache, S Toumi, A Benhaoues - … : Revue des Sciences et de la …, 2018 - ajol.info
Les réseaux sur puce ont émergé comme une solution d'interconnexion évolutive, flexible et
réutilisable pour les applications des systèmes sur puce. Inspirés des réseaux …

[PDF][PDF] On-Chip Interconnect mechanism based on CDMA

V Kumar, V Rajesh - … © 2012 Votrix Publication (team. ijaiti@ gmail …, 2012 - researchgate.net
The integration of complete Network-on-chip (NoC) designs consisting of large number of
Intellectual Property (IP) blocks (cores) on the same silicon die is becoming technically …

Serial Recovery in PCE Enabled Wavelength Routed Optical Network

Y Hua, C Hua, G Chen, J Yang, G Wang… - 2011 Fourth …, 2011 - ieeexplore.ieee.org
In this paper, Serial Recovery (SR) scheme is proposed in PCE enabled wavelength routed
optical network. In some scenarios recovery time is not strictly emphasized and SR can be …