OpenMP has gained wide popularity as an API for parallel programming on shared memory
and distributed shared memory platforms. It is also a promising candidate to exploit the …

Multi-valued logic is an apparent extension of binary logic where any proposition can have
more than 2 values. Interconnections play a crucial role in deep sub-micron designs …

A multi-valued logic (MVL) circuit includes a MVL clock generator that generates a MVL
clock signal having three or more ith MVL levels, a single MVL clock signal distribution …

Some high performance digital integrated circuits use multi-phase clock distribution systems
with level-sensitive latches as clocked storage elements. A set of N periodic non …

The explosive growth of semiconductor industry over a decade have been driven by rapid
scaling of complementary metal-oxide-semiconductor (CMOS) technology. Multiple-valued …

SRAM act us cache memory such as L2 and L3 in CPU and also used as interface between
the CPU and DRAM. SRAM provides high operating speed and low power consumption due …

In this paper, a multiple valued register file (MVRF) with 2-read 1-write circuit is designed in
TSMC Low Power 65nm CMOS. High VTH and Low VTH transistors are organized together …

In the today's high performance Integrated Circuit (IC) design world, millions of transistors
are present on the IC chip to perform complex computing at higher clock frequencies. The …

Multi-pha c clocking methods arc well known and widely u cd in high perfonnancc integrated
cir uil design. uch a scheme allow for relaxation of Liming con'lrninls among di joint partition …

Multi-phase clocking methods are well known and widely used in high-performance
integrated circuit design. Such a scheme allows for relaxation of timing constraints among …