Since their inception more than thirty years ago, field-programmable gate arrays (FPGAs)
have been widely used to implement a myriad of applications from different domains. As a …

Binarized neural networks (BNNs) are ultra-reduced precision neural networks, having
weights and activations restricted to single-bit values. BNN computations operate on bitwise …

Although redundant addition is widely used to design parallel multioperand adders for ASIC
implementations, the use of redundant adders on Field Programmable Gate Arrays (FPGAs) …

Integrating DSP blocks into FPGAs is an effective approach to close the existing gap
between FPGAs and ASICs. A much wider range of applications could benefit from DSP …

This paper introduces a methodology to optimize coarse-grained floating point units (FPUs)
in a hybrid field-programmable gate array (FPGA), where the FPU consists of a number of …

We propose a new DSP block for use in modern high-performance FPGAs. Current DSP
blocks contain fixed-bitwidth multipliers that can be combined efficiently to form larger …

The DSP block can effectively improve the performance of arithmetic operation in FPGA.
However, the commercial FPGA does not directly support multi-operands addition operation …

Field-programmable gate arrays (FPGAs) offer an alternative to application-specific
integrated circuits (ASICs) that is attractive in scenarios where flexibility may be required or …

Video transmission over wireless ad hoc networks is hampered by packet losses. Even a
single packet loss may cause error propagation until an intra-coded frame is received …

Embedded hard DSP block effectively improves FPGA performance for arithmetic circuits.
This paper proposes a novel DSP architecture. By adopting a new Compressor Array, the …