Concurrent error detection (CED) techniques (based on hardware duplication, parity codes,
etc.) are widely used to enhance system dependability. All CED techniques introduce some …

When you think about how far and fast computer science has progressed in recent years, it's
not hard to conclude that a seven-year old handbook may fall a little short of the kind of …

Modern electronics testing has a legacy of more than 40 years. The introduction of new
technologies, especially nanometer technologies with 90nm or smaller geometry, has …

In this paper, a new paradigm for designing logic circuits with concurrent error detection
(CED) is described. The key idea is to exploit the asymmetric soft error susceptibility of …

This paper presents a built-in soft error resilience (BISER) technique for correcting radiation-
induced soft errors in latches and flip-flops. The presented error-correcting latch and flip-flop …

This paper proposes a new class of codes termed" weight-based codes" where each output
bit is assigned a weight and the check bits represent the stem of the weights of the output …

We present two techniques for correcting radiation-induced soft errors in combinational logic-
error correction using duplication, and error correction using time-shifted outputs. Simulation …

There are increasing concerns about possible malicious modifications of integrated circuits
(ICs) used in critical applications. Such attacks are often referred to as hardware Trojans …

16S rRNA gene profiling has recently been boosted by the development of pyrosequencing
methods. A common analysis is to group pyrosequences into Operational Taxonomic Units …

В книге рассматриваются коды с суммированием, при построении которых
предварительно устанавливается неравноправие между разрядами информационных …