Analog to digital converters (ADC): A literature review

H Dalmia, SK Sinha - E3S Web of Conferences, 2020 - e3s-conferences.org
The signal processing is advancing day by day as its needs and in wireline/wireless
communication technology from 2G to 4G cellular communication technology with CMOS …

Design of two stage operational amplifier and implementation of flash ADC

P Sowmya, M Samson, MJ Mehdi - 2021 Third International …, 2021 - ieeexplore.ieee.org
In this paper, Flash Analog to digital converter is implemented whose resolution is 3-bits.
The designed Flash ADC consists of a resistive ladder network, comparators, the …

Implementation of low supply rail-to-rail differential voltage comparator on flexible hardware for a flash ADC

A Gupta, A Singh, A Agarwal - Journal of Circuits, Systems and …, 2020 - World Scientific
A 4-bit flash ADC utilizing the advantage of digital-based differential voltage comparator is
presented in this paper. This circuit has an advantage of digital circuit concept and can be …

[PDF][PDF] Design and Analysis of 4-bit 1.2 GS/s Low Power CMOS Clocked Flash ADC.

G Prathiba, M Santhi - Intelligent Automation & Soft Computing, 2022 - cdn.techscience.cn
High-quality, high-resolution flash ADCs are used in reliable VLSI (Very Large-Scale
Integrated) circuits to minimize the power consumption. An analogue electrical signal is …

[PDF][PDF] Power efficient 4-bit flash ADC using Cadence Virtuoso

NH Patel - Int J Eng Res Technol (IJERT), 2021 - researchgate.net
Analog-to-Digital Converters (ADCs) are useful building blocks in many applications like a
biomedical, data storage read channel and an optical receiver because they represent the …

Functional validation of highly synthesizable voltage comparator on FPGA

A Gupta, A Singh, M Bansal, A Agarwal - Integration, 2022 - Elsevier
In the present work, a methodology has been proposed to design analog/mixed-signal
circuits using digital-in-concept circuits in digital technology. This paper presents a digital …

VLSI Architecture for High Performance Wallace Tree Encoder

JM Mathana, R Dhanagopal… - 2020 6th International …, 2020 - ieeexplore.ieee.org
In the research, the VLSI architecture design for Wallace tree encoder with modified full
adder is proposed. In analog to digital conversion process, Wallace tree encoder is utilized …

A novel CZP-BC-FLASH ADC using zero phase bubble error robust controller for reliable VLSI circuits

M Kalaiyarasi, S Saravanan, K Karunanithi… - International Journal of …, 2021 - Springer
To process the data, accurate and reliable, analog to digital converter (ADC) is an essential
element in most applications such as satellite communication, instrumentation and …

A full input range, 1–1.8 V voltage supply scalable analog voltage comparator in 180nm CMOS

A Gupta, A Singh, A Agarwal - International Journal of Electronics, 2021 - Taylor & Francis
ABSTRACT A voltage supply scalable analog voltage comparator for a wide input range is
presented in this paper. A digital gate-based methodology is used to design the comparator …

Low area and high-performance 6-bit MUX based flash ADC for wide band applications

B Krishna, SS Gill, A Kumar - Optical and Quantum Electronics, 2022 - Springer
This work presents a design of 6-bit, 1 Gs/s, low power (less than 100 mW), low offset, low
area, high resolution, high speed, and flash ADC data converter. To reach these …