On reduction of deterministic test pattern sets

S Eggersglüß, S Milewski, J Rajski… - 2021 IEEE International …, 2021 - ieeexplore.ieee.org
Test compaction and the associated test data compression are two key components of the
post-production test as they reduce test pattern counts, the resultant test data volume, test …

Special session: Survey of test point insertion for logic built-in self-test

Y Sun, SK Millican, VD Agrawal - 2020 IEEE 38th VLSI Test …, 2020 - ieeexplore.ieee.org
This article surveys test point (TP) architectures and test point insertion (TPI) methods for
increasing pseudo-random and logic built-in self-test (LBIST) fault coverage. We present a …

Logic BIST with capture-per-clock hybrid test points

E Moghaddam, N Mukherjee, J Rajski… - … on Computer-Aided …, 2018 - ieeexplore.ieee.org
Logic built-in self-test (LBIST) is now increasingly used with on-chip test compression as a
complementary solution for in-system test, where high quality, low power, low silicon area …

Improved random pattern delay fault coverage using inversion test points

S Roy, B Stiene, SK Millican… - 2019 IEEE 28th North …, 2019 - ieeexplore.ieee.org
This article analyzes and rationalizes the capabilities of inversion-based test points (TPs)
when implemented in lieu of control-0/1 TPs. With upward scaling of transistor density, delay …

Test time and area optimized BrST scheme for automotive ICs

N Mukherjee, D Tille, M Sapati, Y Liu… - 2019 IEEE …, 2019 - ieeexplore.ieee.org
As cars become increasingly computerized and their safety functions are evolving rapidly,
the number of complex safety-critical components deployed in advanced driver assistance …

Deep transfer learning approach for digital circuits vulnerability analysis

MM Rahimifar, H Jahanirad, M Fathi - Expert Systems with Applications, 2024 - Elsevier
Hardware Trojans (HT) are the most malicious components attacking modern integrated
circuits (ICs). Information leakage, incorrect functionality, and overheating are the major …

Applying artificial neural networks to logic built-in self-test: improving test point insertion

Y Sun, SK Millican - Journal of Electronic Testing, 2022 - Springer
This study applies artificial neural networks (ANNs) to increase stuck-at and delay fault
coverage of logic built-in self-test (LBIST) through test point insertion (TPI). Increasing TPI …

Time and area optimized testing of automotive ICs

N Mukherjee, D Tille, M Sapati, Y Liu… - … Transactions on Very …, 2020 - ieeexplore.ieee.org
As cars become increasingly computerized and their safety functions evolve rapidly, the
number of complex safety-critical components deployed in advanced driver assistance …

Functional Compaction for Functional Test Sequences

I Pomeranz - IEEE Access, 2024 - ieeexplore.ieee.org
The occurrence of silent data corruption because of hardware defects in large scale data
centers points to the advantages of applying functional test sequences to detect hardware …

Improved pseudo-random fault coverage through inversions: a study on test point architectures

S Roy, B Stiene, SK Millican, VD Agrawal - Journal of Electronic Testing, 2020 - Springer
This article analyzes and rationalizes the capabilities of inversion test points (TPs) when
implemented in lieu of traditional test point architectures. With scaling transistor density …