This article surveys test point (TP) architectures and test point insertion (TPI) methods for increasing pseudo-random and logic built-in self-test (LBIST) fault coverage. We present a …
Logic built-in self-test (LBIST) is now increasingly used with on-chip test compression as a complementary solution for in-system test, where high quality, low power, low silicon area …
S Roy, B Stiene, SK Millican… - 2019 IEEE 28th North …, 2019 - ieeexplore.ieee.org
This article analyzes and rationalizes the capabilities of inversion-based test points (TPs) when implemented in lieu of control-0/1 TPs. With upward scaling of transistor density, delay …
As cars become increasingly computerized and their safety functions are evolving rapidly, the number of complex safety-critical components deployed in advanced driver assistance …
Hardware Trojans (HT) are the most malicious components attacking modern integrated circuits (ICs). Information leakage, incorrect functionality, and overheating are the major …
Y Sun, SK Millican - Journal of Electronic Testing, 2022 - Springer
This study applies artificial neural networks (ANNs) to increase stuck-at and delay fault coverage of logic built-in self-test (LBIST) through test point insertion (TPI). Increasing TPI …
N Mukherjee, D Tille, M Sapati, Y Liu… - … Transactions on Very …, 2020 - ieeexplore.ieee.org
As cars become increasingly computerized and their safety functions evolve rapidly, the number of complex safety-critical components deployed in advanced driver assistance …
I Pomeranz - IEEE Access, 2024 - ieeexplore.ieee.org
The occurrence of silent data corruption because of hardware defects in large scale data centers points to the advantages of applying functional test sequences to detect hardware …
This article analyzes and rationalizes the capabilities of inversion test points (TPs) when implemented in lieu of traditional test point architectures. With scaling transistor density …