Nanowire electronics: from nanoscale to macroscale

C Jia, Z Lin, Y Huang, X Duan - Chemical reviews, 2019 - ACS Publications
Semiconductor nanowires have attracted extensive interest as one of the best-defined
classes of nanoscale building blocks for the bottom-up assembly of functional electronic and …

Chirality‐Induced Spin Selectivity: An Enabling Technology for Quantum Applications

A Chiesa, A Privitera, E Macaluso… - Advanced …, 2023 - Wiley Online Library
Molecular spins are promising building blocks of future quantum technologies thanks to the
unparalleled flexibility provided by chemistry, which allows the design of complex structures …

Ionic charge distributions in silicon atomic surface wires

J Croshaw, T Huff, M Rashidi, J Wood, E Lloyd, J Pitters… - Nanoscale, 2021 - pubs.rsc.org
Using a non-contact atomic force microscope (nc-AFM), we examine continuous dangling
bond (DB) wire structures patterned on the hydrogen terminated silicon (100)-2× 1 surface …

Graphene‐on‐Silicon Hybrid Field‐Effect Transistors

M Fomin, F Pasadas, EG Marin… - Advanced electronic …, 2023 - Wiley Online Library
The combination of graphene and silicon in hybrid electronic devices has attracted
increasing attention over the last decade. Here, a unique technology of graphene‐on‐silicon …

Reduced electron temperature in silicon multi-quantum-dot single-electron tunneling devices

Y Lee, SH Lee, HS Son, S Lee - Nanomaterials, 2022 - mdpi.com
The high-performance room-temperature-operating Si single-electron transistors (SETs)
were devised in the form of the multiple quantum-dot (MQD) multiple tunnel junction (MTJ) …

A diagrammatic approach to single-electron spintronics and a new analytical model for ferromagnetic single-electron transistors

M Ahmadian, MJ Sharifi - AEU-International Journal of Electronics and …, 2019 - Elsevier
In this paper, we propose a diagrammatic approach to single-electron spintronics and
develop a new analytical model for ferromagnetic single electron transistors (FSETs) using …

Performance investigation of nanoscale reversible logic gates designed with SE-TLG Approach

A Ghosh, SK Sarkar - International Journal of Electronics, 2020 - Taylor & Francis
The progressive shrinking of MOS dimensions confronts critical issues while designing low
power consuming computational devices. The Single Electron Technology is one of the …

Non-uniaxial stress-assisted fabrication of nanoconstriction on vertical nanostructured Si

M Zeng, X Li, Y Huang, Z Huang, R Zhan… - …, 2019 - iopscience.iop.org
Vertically aligned Si nanoconstrictions have potential for applications of electronic, photonic
and phononic nanodevices. Herein, we report a featured method by utilizing the non …

All two-input logic gates by a single-stage single electron box

MJ Sharifi, M Ahmadian - International Journal of Electronics, 2018 - Taylor & Francis
In this paper, the design of all two-input logic gates is presented by only a single-stage
single electron box (SEB) for the first time. All gates are constructed based on a same circuit …

Quantum interference in silicon one-dimensional junctionless nanowire field-effect transistors

FJ Schupp, MM Mirza, DA MacLaren, GAD Briggs… - Physical Review B, 2018 - APS
We investigate the low-temperature transport in 8-nm-diam Si junctionless nanowire field-
effect transistors fabricated by top down techniques with a wraparound gate and two …