Performance analysis of low-power 1-bit CMOS full adder cells
AM Shams, TK Darwish… - IEEE transactions on very …, 2002 - ieeexplore.ieee.org
A performance analysis of 1-bit full-adder cell is presented. The adder cell is anatomized
into smaller modules. The modules are studied and evaluated extensively. Several designs …
into smaller modules. The modules are studied and evaluated extensively. Several designs …
Ultra low-voltage low-power CMOS 4-2 and 5-2 compressors for fast arithmetic circuits
CH Chang, J Gu, M Zhang - … on Circuits and Systems I: Regular …, 2004 - ieeexplore.ieee.org
This paper presents several architectures and designs of low-power 4-2 and 5-2
compressors capable of operating at ultra low supply voltages. These compressor …
compressors capable of operating at ultra low supply voltages. These compressor …
Low-voltage low-power CMOS full adder
D Radhakrishnan - IEE Proceedings-Circuits, Devices and Systems, 2001 - IET
Low-power design of VLSI circuits has been identified as a critical technological need in
recent years due to the high demand for portable consumer electronics products. In this …
recent years due to the high demand for portable consumer electronics products. In this …
A novel high-performance CMOS 1-bit full-adder cell
AM Shams, MA Bayoumi - … on circuits and systems II: Analog …, 2000 - ieeexplore.ieee.org
A novel 16-transistor CMOS 1-bit full-adder cell is proposed. It uses the low-power designs
of the XOR and XNOR gates, pass transistors, and transmission gates. The cell offers higher …
of the XOR and XNOR gates, pass transistors, and transmission gates. The cell offers higher …
[PDF][PDF] Low-Power and High-Performance 1-Bit CMOS Full-Adder Cell.
In this paper a new low power and high performance adder cell using a new design style
called “Bridge” is proposed. The bridge design style enjoys a high degree of regularity …
called “Bridge” is proposed. The bridge design style enjoys a high degree of regularity …
Low power CMOS pass logic 4-2 compressor for high-speed multiplication
D Radhakrishnan, AP Preethy - Proceedings of the 43rd IEEE …, 2000 - ieeexplore.ieee.org
A novel CMOS 4-2 compressor using pass logic is presented in this paper. An XOR-XNOR
combination gate is used to build the circuit while totally eliminating the use of inverters. The …
combination gate is used to build the circuit while totally eliminating the use of inverters. The …
A novel low-power full-adder cell with new technique in designing logical gates based on static CMOS inverter
A new low-power full-adder based on CMOS inverter is presented. This full-adder is
comprised of inverters. Universal gates such as NOR, NAND and MAJORITY-NOT gates are …
comprised of inverters. Universal gates such as NOR, NAND and MAJORITY-NOT gates are …
Ultra low voltage, low power 4-2 compressor for high speed multiplications
J Gu, CH Chang - … Symposium on Circuits and Systems (ISCAS …, 2003 - ieeexplore.ieee.org
This paper presents a new low power 4-2 compressor capable of operating at an ultra-low
voltage. Its merits are derived from a novel design of low-power XOR-XNOR gate at …
voltage. Its merits are derived from a novel design of low-power XOR-XNOR gate at …
Performance analysis of high speed hybrid CMOS full adder circuits for low voltage VLSI design
S Wairya, RK Nagaria, S Tiwari - VLSI Design, 2012 - Wiley Online Library
This paper presents a comparative study of high‐speed and low‐voltage full adder circuits.
Our approach is based on hybrid design full adder circuits combined in a single unit. A high …
Our approach is based on hybrid design full adder circuits combined in a single unit. A high …
A 10-transistor low-power high-speed full adder cell
HA Mahmoud, MA Bayoumi - 1999 IEEE International …, 1999 - ieeexplore.ieee.org
In this paper, we introduce a high-speed low-power 10-transistor 1-bit full adder cell. The
critical path consists of an XOR gate; an inverter and one pass transistor. A prototype of the …
critical path consists of an XOR gate; an inverter and one pass transistor. A prototype of the …