A new generation of memory devices enabled by ferroelectric hafnia and zirconia

T Schenk, S Mueller - 2021 IEEE International Symposium on …, 2021 - ieeexplore.ieee.org
With the emergence of ferroelectric HfO 2-and ZrO 2-based thin films, the topic of
ferroelectric memories has been experiencing a renaissance. These novel ferroelectric …

A negative capacitance FET based energy efficient 6T SRAM computing-in-memory (CiM) cell design for deep neural networks

V Birudu, SS Yellampalli, R Vaddi - Microelectronics Journal, 2023 - Elsevier
Abstract An Energy-Efficient Computing-in-Memory (CiM) cell design utilizing a Negative
Capacitance (NC) FET has been proposed to support computing architectures for Deep …

Negative capacitance FET based dual-split control 6T-SRAM cell design for energy efficient and robust computing-in memory architectures

B Venu, T Kadiyam, K Penumalli, S Yellampalli… - Microelectronic …, 2024 - Elsevier
Abstract A Negative Capacitance Field effet transistor (NCFET) based Dual split control
(DSC) 6T-SRAM cell has been designed and explored with Computing-in memory (CiM) …

Analysis of using negative capacitance FETs to optimize linearity performance for voltage reference generators

H Liu, J Zhao, Y Zhang, F Xiao, Y Liu… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
Emerging voltage reference generators (VRGs) are of great demand for low-power
applications in recent years. However, keeping good linearity for VRGs in deep …

Design and Exploration of Negative Capacitance FETs for Energy Efficient SRAM based In-Memory XNOR/Input and Weight Product Operation for Deep Neural …

B Venu, SS Yellampalli, R Vaddi - 2022 IEEE International …, 2022 - ieeexplore.ieee.org
A Negative capacitance field effect transistor (NCFET) based 6T SRAM based Computing-in
memory (CIM) cell has been designed and explored for energy efficient demonstration of …

Computational modelling of cylindrical-ferroelectric-dual metal-nanowire field effect transistor (C-FE-DM-NW FET) using landau equation for gate leakage …

A Kaul, S Yadav, S Rewari, D Nand - Micro and Nanostructures, 2024 - Elsevier
In order to address and resolve the significant problem of gate-induced drain leakage (GIDL)
current and enhance device reliability, band-to-band tunnelling (BTBT), and OFF-state …

Architecture and optimization of 2T (footprint) SRAM

CC Chung, HC Lin, BW Huang… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
A 6T-SRAM bitcell with the footprint of only two transistors is demonstrated by stacking four n-
type vertical gate-all-around transistors (VFET) on two pFinFETs. The local interconnects are …

Monte Carlo variation analysis of NCFET-based 6-T SRAM: Design opportunities and trade-offs

S Alam, N Amin, SK Gupta, A Aziz - Proceedings of the 2021 on Great …, 2021 - dl.acm.org
Negative Capacitance FET (NCFET) is one of the most promising variants of the emerging
steep-slope transistors, able to overcome the? Boltzmann limit'. The ferroelectric layer in the …

2 Technical Demands of

SM Bhat, P Singh, R Yadav, SB Rahi… - Negative …, 2023 - books.google.com
Energy saving is a most promising sector of research and development. Nowadays, energy
saving or low power is becoming a critical challenge that is most important for the future of …

5 Basic Operational Principle of Anti

UC Binda, SB Rahib - Negative Capacitance Field Effect …, 2023 - books.google.com
So far, there has been a continuous and steady growth of the market for mobile computing
devices, wireless systems, and biomedical implantable devices [1–5]. This has led to a …