FPGA-based Physical Unclonable Functions: A comprehensive overview of theory and architectures

NN Anandakumar, MS Hashmi, M Tehranipoor - Integration, 2021 - Elsevier
Abstract Physically Unclonable Functions (PUFs) are a promising technology and have
been proposed as central building blocks in many cryptographic protocols and security …

Lightweight and privacy-preserving two-factor authentication scheme for IoT devices

P Gope, B Sikdar - IEEE Internet of Things Journal, 2018 - ieeexplore.ieee.org
Device authentication is an essential security feature for Internet of Things (IoT). Many IoT
devices are deployed in the open and public places, which makes them vulnerable to …

Survey of hardware protection of design data for integrated circuits and intellectual properties

B Colombier, L Bossuet - IET Computers & Digital Techniques, 2014 - Wiley Online Library
This study reviews the current situation regarding design protection in the microelectronics
industry. Over the past 10 years, the designers of integrated circuits (IC) and intellectual …

FPGA intrinsic PUFs and their use for IP protection

J Guajardo, SS Kumar, GJ Schrijen, P Tuyls - Cryptographic Hardware and …, 2007 - Springer
In recent years, IP protection of FPGA hardware designs has become a requirement for
many IP vendors. In [34], Simpson and Schaumont proposed a fundamentally different …

The butterfly PUF protecting IP on every FPGA

SS Kumar, J Guajardo, R Maes… - … Security and Trust, 2008 - ieeexplore.ieee.org
IP protection of hardware designs is the most important requirement for many FPGA IP
vendors. To this end, various solutions have been proposed by FPGA manufacturers based …

Deep learning based model building attacks on arbiter PUF compositions

P Santikellur, A Bhattacharyay… - Cryptology ePrint …, 2019 - eprint.iacr.org
Robustness to modeling attacks is an important requirement for PUF circuits. Several
reported Arbiter PUF com-positions have resisted modeling attacks. and often require huge …

Efficient helper data key extractor on FPGAs

C Bösch, J Guajardo, AR Sadeghi, J Shokrollahi… - … and Embedded Systems …, 2008 - Springer
Abstract Physical Unclonable Functions (PUFs) have properties that make them very
attractive for a variety of security-related applications. Due to their inherent dependency on …

A PUF-FSM binding scheme for FPGA IP protection and pay-per-device licensing

J Zhang, Y Lin, Y Lyu, G Qu - IEEE Transactions on Information …, 2015 - ieeexplore.ieee.org
With its reprogrammability, low design cost, and increasing capacity, field-programmable
gate array (FPGA) has become a popular design platform and a target for intellectual …

Physical unclonable functions and public-key crypto for FPGA IP protection

J Guajardo, SS Kumar, GJ Schrijen… - … Conference on Field …, 2007 - ieeexplore.ieee.org
In recent years, IP protection of FPGA hardware designs has become a requirement for
many IP vendors. To this end solutions have been proposed based on the idea of bitstream …

High-speed true random number generation with logic gates only

M Dichtl, JD Golić - … Hardware and Embedded Systems-CHES 2007: 9th …, 2007 - Springer
It is shown that the amount of true randomness produced by the recently introduced Galois
and Fibonacci ring oscillators can be evaluated experimentally by restarting the oscillators …