A high swing charge pump with current mismatch reduction for PLL applications
Y Chen, Y Han, S Wang - IEICE Electronics Express, 2021 - jstage.jst.go.jp
A charge pump (CP) is widely used in modern phase-locked loop (PLL) implementations.
The CP current mismatch is a dominant source of static phase offset and reference spur in …
The CP current mismatch is a dominant source of static phase offset and reference spur in …
0.1–5 GHz wideband ΔΣ fractional‐N frequency synthesiser for software‐defined radio application
This article proposes a wideband ΔΣ fractional‐N frequency synthesiser (WBFS) for software‐
defined radio application. The frequency synthesiser has two modes: the regular mode with …
defined radio application. The frequency synthesiser has two modes: the regular mode with …
Fully integrated fractional‐N phase‐locked loop for GNSS standards
Z Ghattan Kashani… - IET Microwaves, Antennas …, 2019 - Wiley Online Library
This study presents the design of a fully integrated fractional‐N phase‐locked loop (FNPLL)
for the Global Navigation Satellite System (GNSS) applications. A new linearisation …
for the Global Navigation Satellite System (GNSS) applications. A new linearisation …
Self-biased and tail current switching LC-VCO in CMOS technology
DM Fard, A Charmin… - 2019 5th Conference on …, 2019 - ieeexplore.ieee.org
This paper presents an LC-VCO with a novel self-biased tail current switching. The
proposed biasing method leads to reduce the phase noise of the LC-VCO when compared …
proposed biasing method leads to reduce the phase noise of the LC-VCO when compared …
A 2.4 GHz integer-N frequency synthesizer for ZigBee applications
M Abdollahy Gharbali, M Azadbakht, E Feyzi… - … Integrated Circuits and …, 2019 - Springer
This paper presents a fully integrated Integer-N Phase Locked Loop (INPLL) for ZigBee
applications. In this paper the effects of delay in the reset path of Phase and Frequency …
applications. In this paper the effects of delay in the reset path of Phase and Frequency …
MASH DDSM with Negative Feedback
Y Liao, X Fan, Z Hua - Journal of Circuits, Systems and Computers, 2019 - World Scientific
This paper proposes a Multi-stAge noise SHaping (MASH) digital delta-sigma modulator
(DDSM) with negative feedback to acquire the maximum sequence length. The …
(DDSM) with negative feedback to acquire the maximum sequence length. The …
Design of Analog Baseband Chain Circuits for IEEE 802.11 a/b/g WLAN Receivers
M Abdollahy, J Sobhi - Electrical Engineering (ICEE), Iranian …, 2018 - ieeexplore.ieee.org
This paper presents a low power CMOS based variable-gain amplifier (VGA) for baseband
receivers in WLAN applications in a standard digital 180nm CMOS technology. The VGA …
receivers in WLAN applications in a standard digital 180nm CMOS technology. The VGA …