(57) ABSTRACT A device management apparatus includes circuitry config ured to: acquire
an updating program for updating a device; transmit the updating program to the device; …

Work can be migrated between processor cores. For example, a thread causing a heavy
load on a first core can be detected. A power control unit can determine to migrate the thread …

An arithmetic device and a control apparatus capable of executing a process according to
an event occurring in one or more functional units connected through a communication …

A PPR memory location reporting system includes BIOS coupled to a non-volatile memory
system and a volatile memory system. During boot operations, the BIOS identifies a memory …

A controller includes: a monitor that monitors an occurrence of a failure in a processor; an
information obtainer that obtains, when the monitor detects the occurrence of the failure, log …

The invention relates to a method of fault management in a network of nodes (2),
comprising, for each node considered (2) of all or part of the nodes (2) of the network …

An alarm register stores therein failure information having a first size and related to a failure
that has occurred in communication performed by each of the CPUs 103 and 104. A failure …

(57) ABSTRACT A PPR memory location reporting system includes BIOS coupled to a non-
volatile memory system and a volatile memory system. During boot operations, the BIOS …

Method and machine for storing massive amounts of information in very small spaces; and
for combining that with the characteristics of very high speed program, write and read …