A survey on VLSI implementation of AES algorithm with dynamic S-Box

KS Dhanalakshmi, RA Padmavathi - Journal of Applied Security …, 2022 - Taylor & Francis
In recent research, very large-scale integration (VLSI) design and its implementation plays a
major role. It has been considered as compact and contains additional techniques …

Hardware architectures for PRESENT block cipher and their FPGA implementations

JG Pandey, T Goel, A Karmakar - IET Circuits, Devices & …, 2019 - Wiley Online Library
Data security is essential for the proliferation of the Internet of things and cyber‐physical
system technologies. Data security can be efficiently achieved by incorporating lightweight …

High-throughput and lightweight hardware structures of HIGHT and PRESENT block ciphers

B Rashidi - Microelectronics Journal, 2019 - Elsevier
In this paper, low-cost and high-throughput hardware implementations of the HIGHT and
PRESENT lightweight block ciphers are presented. One of the most complex blocks in the …

Design and Implementation of novel datapath designs of lightweight cipher RECTANGLE for resource constrained environment

V Dahiphale, H Raut, G Bansod - Multimedia Tools and Applications, 2019 - Springer
The advancements in IoT and manufacturing techniques has given rise to the use of small
embedded devices such as RFIDs, sensor nodes and smart cards. Due to hardware and …

Efficient and high‐throughput application‐specific integrated circuit implementations of HIGHT and PRESENT block ciphers

B Rashidi - IET Circuits, Devices & Systems, 2019 - Wiley Online Library
In this study, low‐cost and high‐throughput hardware implementations of the HIGHT (HIGh
security and lightweigHT) and PRESENT lightweight block ciphers are presented. One of the …

[PDF][PDF] Lightweight ANU-II block cipher on field programmable gate array

NH Yousif, YA Abbas, MH Ali - International Journal of Electrical and …, 2022 - academia.edu
Nowadays the number of embedded devices communicating over a network is increasing.
Thus, the need for security appeared. Considering various constraints for the limited …

A high-performance VLSI architecture of the PRESENT cipher and its implementations for SoCs

JG Pandey, T Goel, M Nayak… - 2018 31st IEEE …, 2018 - ieeexplore.ieee.org
The essence of internet-of-things (IoT) and cyber-physical systems (CPS) infrastructures is
primarily based on privacy and security of communicated data. In these resource …

Low area field‐programmable gate array implementation of PRESENT image encryption with key rotation and substitution

S Parikibandla, S Alluri - ETRI Journal, 2021 - Wiley Online Library
Lightweight ciphers are increasingly employed in cryptography because of the high demand
for secure data transmission in wireless sensor network, embedded devices, and Internet of …

8‐bit serialised architecture of SEED block cipher for constrained devices

F Pirpilidis, L Pyrgas, P Kitsos - IET Circuits, Devices & Systems, 2020 - Wiley Online Library
This study presents an 8‐bit serialised architecture of SEED block cipher for constrained
devices. The circuit utilises 356 FPGA slices and 447 1‐bit registers flip‐flops (FFs) in the …

Efficient hardware mapping of Boolean substitution boxes based on functional decomposition for RFID and ISM band IoT applications

R Mishra, M Okade, K Mahapatra - Integration, 2023 - Elsevier
This paper investigates three substitution box (S-box) designs for lightweight ciphers. The
proposed designs involve functional decomposition, which is preferable as compared to the …