Thermal conductivity of graphene ribbons from equilibrium molecular dynamics: Effect of ribbon width, edge roughness, and hydrogen termination

WJ Evans, L Hu, P Keblinski - Applied Physics Letters, 2010 - pubs.aip.org
We use equilibrium molecular dynamic simulations to compute thermal conductivity of
graphene nanoribbons with smooth and rough edges. We also study effects of hydrogen …

Challenges of 22 nm and beyond CMOS technology

R Huang, HM Wu, JF Kang, DY Xiao, XL Shi… - Science in China Series …, 2009 - Springer
It is predicted that CMOS technology will probably enter into 22 nm node around 2012.
Scaling of CMOS logic technology from 32 to 22 nm node meets more critical issues and …

Fully Printed Negative-Capacitance Field-Effect Transistors with Ultralow Subthreshold Swing and High Inverter Signal Gain

JR Pradhan, S Dasgupta - ACS Applied Materials & Interfaces, 2024 - ACS Publications
The switching of conventional field-effect transistors (FETs) is limited by the Boltzmann
barrier of thermionic emission, which prevents the realization of low-power electronics. In …

Bulk fin-field effect transistors with well defined isolation

K Cheng, BS Haran, S Ponoth, TE Standaert… - US Patent …, 2013 - Google Patents
A fin field-effect-transistor fabricated by forming a dummy fin structure on a semiconductor
substrate. A dielectric layer is formed on the semiconductor substrate. The dielectric layer …

Compairing FinFETs: SOI Vs Bulk: Process variability, process cost, and device performance

R Deshmukh, A Khanzode, S Kakde… - … and Control (IC4), 2015 - ieeexplore.ieee.org
Keeping up with the recognition of FinFET (FIN shaped Field Effect Transistor) devices, this
paper focuses on the different flavors of FinFETs. FinFET technologies appeared to …

[PDF][PDF] 后摩尔时代大规模集成电路器件与集成技术

黎明, 黄如 - 中国科学: 信息科学, 2018 - scis.scichina.com
摘要本文梳理了微纳电子器件技术从等比例缩小的技术路线发展到以功耗降低为核心的后摩尔
时代技术路线的过程, 阐述了从等比例缩小到功耗缩小的微纳电子器件技术发展趋势 …

Bulk fin-field effect transistors with well defined isolation

K Cheng, BS Haran, S Ponoth, TE Standaert… - US Patent …, 2015 - Google Patents
A process fabricates a fin field-effect-transistor by implanting a dopant into an exposed
portion of a semiconductor substrate within a cavity. The cavity is formed in a dielectric layer …

High performance SiGe body-on-insulator (BOI) FinFET fabricated on bulk Si substrate using Ge condensation technique

Z Ren, X An, B Zhang, S Sun, F Gao… - IEEE Electron …, 2020 - ieeexplore.ieee.org
A novel high performance SiGe Body-On-Insulator (BOI) FinFET device fabricated on bulk
silicon substrate is demonstrated in this letter. A key fabrication process of “isotropic …

Bulk fin-field effect transistors with well defined isolation

K Cheng, BS Haran, S Ponoth, TE Standaert… - US Patent …, 2013 - Google Patents
In one embodiment, a computer program Storage product for forming a fin field-effect-
transistor is disclosed. The com puter program storage product comprises instructions config …

Rare-earth oxide isolated semiconductor fin

K Cheng, J Ervin, C Pei, RM Todi, G Wang - US Patent 8,853,781, 2014 - Google Patents
US8853781B2 - Rare-earth oxide isolated semiconductor fin - Google Patents
US8853781B2 - Rare-earth oxide isolated semiconductor fin - Google Patents Rare-earth …