A comparative study of ring VCO and LC-VCO: Design, performance analysis, and future trends

NR Sivaraaj, KKA Majeed - IEEE Access, 2023 - ieeexplore.ieee.org
Voltage-controlled Oscillator (VCO) is a prominent part that has been used to generate a
stable frequency for the high-frequency transceiver system. This survey encompasses a …

Design and analysis of current starved vco targeting scl 180 nm cmos process

C Shekhar, S Qureshi - 2018 IEEE International Symposium on …, 2018 - ieeexplore.ieee.org
This paper presents a low power 5-stage current starved voltage controlled oscillator,
designed at 50 MHz. For control voltage varying from 0.4 V to 1.6 V, the oscillator frequency …

A 0.08%/V 32.3-ppm/C 36.6-kHz Unregulated Current-Reuse Ring Oscillator With -Ratio-Based Compensation Using One-Type-Only Resistor

Z Dong, S Liu, X Zhao, B Hao, X Su… - IEEE Journal of Solid …, 2024 - ieeexplore.ieee.org
This article introduces a 36.6-kHz unregulated ring oscillator (RO) tailored for Internet-of-
Things (IoT) applications, demonstrating robustness to variations in supply voltage and …

Correlation of capacitance and microscopy measurements using image processing for a lab-on-CMOS microsystem

BP Senevirathna, S Lu, MP Dandin… - … Circuits and Systems, 2019 - ieeexplore.ieee.org
We present a capacitance sensor chip developed in a 0.35-μm complementary metal-oxide-
semiconductor process for monitoring biological cell viability and proliferation. The chip …

Clock jitter reduction and flat frequency generation in PLL using autogenerated control feedback

S Bhowmik, SN Pradhan… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
In this paper, a method has been proposed by which one can reduce the clock jitter and
achieve almost flat frequency clock output from the phase-locked loop (PLL), independent of …

A progressive phase multiple-injection locking technique for jitter suppression in voltage-controlled ring oscillator

A Mishra, A Singh, A Agarwal - International Journal of Electronics, 2024 - Taylor & Francis
This paper presents a jitter reduction technique for a voltage-controlled ring oscillator
(VCRO). This technique is useful in employing VCRO-based circuits like Analog to Digital …

[PDF][PDF] Design and Analysis of a Low Power Current Starved VCO for ISM band Application

N Anjum, VKS Yadav, V Nath - Int. J. Microsyst. Iot, 2023 - researchgate.net
This research paper explores the applications of current starved oscillators in the Industrial,
Scientific, and Medical (ISM) band, specifically focusing on the frequency range of 2.4 GHz …

Switched pseudo-current mirror inverter for low-power, thermally stable and robust ring oscillator

MM Morsali, M Shalchian - Integration, 2022 - Elsevier
This paper proposes a low-power inverter in 65 nm CMOS technology, which utilizes a
switched pseudo-current mirror to control the pull-up network and to reduce the short-circuit …

Design and analysis of a symmetric phase locked loop for low frequencies in 180 nm technology

P Arya, D Jangid, SP Tiwari… - … Devices, Circuits and …, 2017 - ieeexplore.ieee.org
Design of a stable Phase Locked Loop (PLL) working in MHz frequency range is proposed.
Focus of this work is to achieve a symmetric design, where rise and fall time are equal for …

Design of a Modified Current Starved Inverter Based Ring Oscillator for Switched Capacitor Circuit

SK Dash, A Bakshi, JR Panda - 2022 IEEE International …, 2022 - ieeexplore.ieee.org
Now a day's Switched capacitor circuits (SC) are widely used in different signal processing
blocks such as Filters and ADCs due to its lower power consumption and lesser area. The …