Extending multicore architectures to exploit hybrid parallelism in single-thread applications
H Zhong, SA Lieberman… - 2007 IEEE 13th …, 2007 - ieeexplore.ieee.org
Chip multiprocessors with multiple simpler cores are gaining popularity because they have
the potential to drive future performance gains without exacerbating the problems of power …
the potential to drive future performance gains without exacerbating the problems of power …
Compiling code for parallel processing architectures based on control flow
W Lee, RA Gottlieb, V Soni, A Agarwal… - US Patent …, 2012 - Google Patents
(57) ABSTRACT A system comprises a plurality of computation units inter connected by an
interconnection network. A method for con figuring the system comprises forming Subsets of …
interconnection network. A method for con figuring the system comprises forming Subsets of …
Redefine: Runtime reconfigurable polymorphic asic
Emerging embedded applications are based on evolving standards (eg, MPEG2/4, H.
264/265, IEEE802. 11a/b/g/n). Since most of these applications run on handheld devices …
264/265, IEEE802. 11a/b/g/n). Since most of these applications run on handheld devices …
Allocating non-real-time and soft real-time jobs in multiclusters
This paper addresses workload allocation techniques for two types of sequential jobs that
might be found in multicluster systems, namely, non-real-time jobs and soft real-time jobs …
might be found in multicluster systems, namely, non-real-time jobs and soft real-time jobs …
Low cost control flow protection using abstract control signatures
The continual trend of shrinking feature sizes and reducing voltage levels makes transistors
faster and more efficient. However, it also makes them more susceptible to transient …
faster and more efficient. However, it also makes them more susceptible to transient …
Data access partitioning for fine-grain parallelism on multicore architectures
The recent design shift towards multicore processors has spawned a significant amount of
research in the area of program parallelization. The future abundance of cores on a single …
research in the area of program parallelization. The future abundance of cores on a single …
SIMD defragmenter: Efficient ILP realization on data-parallel architectures
Single-instruction multiple-data (SIMD) accelerators provide an energy-efficient platform to
scale the performance of mobile systems while still retaining post-programmability. The …
scale the performance of mobile systems while still retaining post-programmability. The …
Placement-and-routing-based register allocation for coarse-grained reconfigurable arrays
DSP architectures often feature multiple register files with sparse connections to a large set
of ALUs. For such DSPs, traditional register allocation algorithms suffer from a lot of …
of ALUs. For such DSPs, traditional register allocation algorithms suffer from a lot of …
Memory access assignment for parallel processing architectures
W Lee, RA Gottlieb, V Soni, A Agarwal… - US Patent …, 2012 - Google Patents
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5,801,958 A 9/1998 Dangelo et al. 6,502,063 B1 12/2002 Eriksson et al. 6,584,611 B2 …
5,801,958 A 9/1998 Dangelo et al. 6,502,063 B1 12/2002 Eriksson et al. 6,584,611 B2 …
Distributing computations in a parallel processing environment
A Agarwal, M Leger - US Patent 7,840,914, 2010 - Google Patents
(57) ABSTRACT A system comprises a plurality of computation units inter connected by an
interconnection network. A method for con figuring the system comprises accepting a set of …
interconnection network. A method for con figuring the system comprises accepting a set of …