Photonic-electronic integrated circuits for high-performance computing and ai accelerators

S Ning, H Zhu, C Feng, J Gu, Z Jiang… - Journal of Lightwave …, 2024 - ieeexplore.ieee.org
In recent decades, the demand for computational power has surged, particularly with the
rapid expansion of artificial intelligence (AI). As we navigate the post-Moore's law era, the …

Rediscovering majority logic in the post-CMOS era: A perspective from in-memory computing

J Reuben - Journal of low power Electronics and Applications, 2020 - mdpi.com
As we approach the end of Moore's law, many alternative devices are being explored to
satisfy the performance requirements of modern integrated circuits. At the same time, the …

[图书][B] Single Flux Quantum Integrated Circuit Design

G Krylov, EG Friedman - 2024 - Springer
Conventional semiconductor-based digital electronics, with complementary metal oxide
semiconductor (CMOS) technology as the primary example, has experienced meteoric …

Boils: Bayesian optimisation for logic synthesis

A Grosnit, C Malherbe, R Tutunov… - … , Automation & Test …, 2022 - ieeexplore.ieee.org
Optimising the quality-of-results (QoR) of circuits during logic synthesis is a formidable
challenge necessitating the exploration of exponentially sized search spaces. While expert …

Accelerated addition in resistive RAM array using parallel-friendly majority gates

J Reuben, S Pechmann - … on Very Large Scale Integration (VLSI …, 2021 - ieeexplore.ieee.org
To overcome the “von Neumann bottleneck,” methods to compute in memory are being
researched in many emerging memory technologies, including resistive RAMs (ReRAMs) …

A novel in-memory wallace tree multiplier architecture using majority logic

V Lakshmi, J Reuben, V Pudi - IEEE Transactions on Circuits …, 2021 - ieeexplore.ieee.org
In-memory computing using emerging technologies such as resistive random-access
memory (ReRAM) addresses the 'von Neumann bottleneck'and strengthens the present …

Asynchronous dynamic single-flux quantum majority gates

G Krylov, EG Friedman - IEEE Transactions on Applied …, 2020 - ieeexplore.ieee.org
Among the major issues in modern large-scale rapid single-flux quantum (RSFQ) circuits are
the complexity of the clock network, tight timing tolerances, poor applicability of existing …

2022 roadmap on neuromorphic devices and applications research in China

Q Wan, C Wan, H Wu, Y Yang, X Huang… - Neuromorphic …, 2022 - iopscience.iop.org
The data throughput in the von Neumann architecture-based computing system is limited by
its separated processing and memory structure, and the mismatching speed between the …

A logic synthesis toolbox for reducing the multiplicative complexity in logic networks

E Testa, M Soeken, H Riener, L Amaru… - … , Automation & Test …, 2020 - ieeexplore.ieee.org
Logic synthesis is a fundamental step in the realization of modern integrated circuits. It has
traditionally been employed for the optimization of CMOS-based designs, as well as for …

Three-input gates for logic synthesis

DS Marakkalage, E Testa, H Riener… - … on Computer-Aided …, 2020 - ieeexplore.ieee.org
Most logic synthesis algorithms work on graph representations of logic functions with nodes
associated with arbitrary logic expressions or simple logic functions and iteratively optimize …