Y Kim, L Nan, J Cong… - IEEE Microwave and …, 2013 - ieeexplore.ieee.org
A multi-Giga-bit/s (up to 6 Gbps) and energy-efficient (1 pJ/bit/m) data link is formed by using hollow plastic cable and CMOS transceivers for short distance (8 m) digital communications …
B Raghavan, D Cui, U Singh, H Maarefi… - IEEE journal of solid …, 2013 - ieeexplore.ieee.org
A 39.8-44.6 Gb/s transmitter and receiver chipset designed in 40 nm CMOS is presented. The line-side TX implements a 2-tap FIR filter with delay-based pre-emphasis. The line-side …
K Kaviani, M Hossain, MH Nazari… - Proceedings of the …, 2012 - ieeexplore.ieee.org
A new 1-tap predictive decision feedback equalizer (prDFE), implemented in 40-nm CMOS LP process, achieves 27-Gb/s operation with 0.41-mW/Gb/s power efficiency. The prDFE …
Power efficient analog to digital converter (ADC) based receivers are desired for wireline communications as the industry transitions to 4-PAM at data-rates above 50Gb/s. A high …
Technology scaling has enabled drastic growth in the computational and storage capacity of integrated circuits (ICs). This constant growth drives an increasing demand for high …
B Raghavan, D Cui, U Singh, H Maarefi, D Pi, A Vasani… - picture.iczhiku.com
The introduction of 40Gb/s networks, spurred by 40Gb/s WDM growth, can alleviate bandwidth bottlenecks of Internet infrastructure while simultaneously reducing operating …
In the earlier days of the Complementary Metal Oxide Semiconductor (CMOS) industry, much effort was dedicated to the performance of device speed and number of transistors per …
Wireline communication has increasingly high demand on data rate. Channel loss is problematic for high speed transmission. Conventionally, analog equalizers are used to …