Design tradeoffs for {SSD} reliability

BS Kim, J Choi, SL Min - 17th USENIX Conference on File and Storage …, 2019 - usenix.org
Flash memory-based SSDs are popular across a wide range of data storage markets, while
the underlying storage medium—flash memory—is becoming increasingly unreliable. As a …

Access characteristic guided read and write cost regulation for performance improvement on flash memory

Q Li, L Shi, CJ Xue, K Wu, C Ji, Q Zhuge… - … USENIX Conference on …, 2016 - usenix.org
The relatively high cost of write operations has become the performance bottleneck of flash
memory. Write cost refers to the time needed to program a flash page using incremental-step …

The Devil Is in the Details: Implementing Flash Page Reuse with {WOM} Codes

F Margaglia, G Yadgar, E Yaakobi, Y Li… - … USENIX Conference on …, 2016 - usenix.org
Flash memory is prevalent in modern servers and devices. Coupled with the scaling down of
flash technology, the popularity of flash memory motivates the search for methods to …

Minimizing retention induced refresh through exploiting process variation of flash memory

Y Di, L Shi, C Gao, Q Li, CJ Xue… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
Refresh schemes have been the default approach in NAND flash memory to avoid data
losses. The critical issue of the refresh schemes is that they introduce additional costs on …

REAL: A retention error aware LDPC decoding scheme to improve NAND flash read performance

M Zhang, F Wu, X He, P Huang… - … 32nd Symposium on …, 2016 - ieeexplore.ieee.org
Continuous technology scaling makes NAND flash cells much denser. As a result, NAND
flash is becoming more prone to various interference errors. Due to the hardware circuit …

Storage device and read reclaim method thereof

HS Jei, H Lee, S Kim - US Patent 10,310,924, 2019 - Google Patents
A read reclaim method of a storage device includes detecting, at a cycle of a random
number of read operations, the number of error bits within non-selection data stored in each …

Exploiting process variation for retention induced refresh minimization on flash memory

Y Di, L Shi, K Wu, CJ Xue - 2016 Design, Automation & Test in …, 2016 - ieeexplore.ieee.org
Solid state drives (SSDs) are becoming the default storage medium with the cost dropping of
NAND flash memory. However, the cost dropping driven by the density improvement and …

Enabling cost-effective flash based caching with an array of commodity ssds

Y Oh, E Lee, C Hyun, J Choi, D Lee… - Proceedings of the 16th …, 2015 - dl.acm.org
SSD based cache solutions are being widely utilized to improve performance in network
storage systems. With a goal of providing a cost-effective, high performing SSD cache …

CooECC: A cooperative error correction scheme to reduce LDPC decoding latency in NAND flash

M Zhang, F Wu, Y Du, C Yang, C Xie… - 2017 IEEE International …, 2017 - ieeexplore.ieee.org
The storage capacity of NAND Flash has increased by scaling down to smaller cell size and
using multi-level storage technology, but data reliability is degraded by severer retention …

Exploiting write heterogeneity of morphable MLC/SLC SSDs in datacenters with service-level objectives

CW Chang, GY Chen, YJ Chen, CW Yeh… - IEEE Transactions …, 2017 - ieeexplore.ieee.org
Given the needs of data-intensive web services and cloud computing applications, storage
centers play an important role in serving the demanded data access while jointly …