Analytical modelling for surface potential of dual material gate overlapped-on-drain TFET (DM-DMG-TFET) for label-free biosensing application

NN Reddy, DK Panda, R Saha - AEU-International Journal of Electronics …, 2022 - Elsevier
This article presented the first-ever 2D analytical model for the surface potential of dual
material gate overlapped-on-drain TFET (DMG-TFET) device for label-free biosensor …

RF with linearity and non-linearity parameter analysis of gate all around negative capacitance junction less FET (GAA-NC-JLFET) for different ferroelectric thickness

P Raut, U Nanda, DK Panda - Physica Scripta, 2022 - iopscience.iop.org
Abstract A novel Gate All Around Negative Capacitance Junction less FET (GAA-NC-JLFET)
is proposed in this work, where different RF/Analog, Linear, and Non-linear parameters were …

Design insights into RF/analog and linearity/distortion of spacer engineered multi‐fin SOI FET for terahertz applications

VB Sreenivasulu, V Narendar - International Journal of RF and …, 2021 - Wiley Online Library
Multi‐fin devices are the most reliable option for terahertz (THz) frequency applications at
nano‐regime. In this work impact of spacer engineering on multi‐fin SOI FET performance is …

Analysis on electrical parameters including temperature and interface trap charges in gate overlap Ge source step shape double gate TFET

R Saha, R Goswami, DK Panda - Microelectronics Journal, 2022 - Elsevier
In this paper, the electrical parameters are evaluated for the variations of temperature in
Gate Overlap Ge source Step Shape Double Gate TFET (GO-Ge-SSDG-TFET) under the …

Design and investigation of dielectric modulated triple metal gate-oxide-stack Z-shaped gate horizontal pocket TFET device as a label-free biosensor

NN Reddy, DK Panda - Journal of Micromechanics and …, 2022 - iopscience.iop.org
In this article, a dielectric modulated triple metal gate-oxide-stack Z-shaped gate horizontal
source pocket tunnel field-effect transistor (DM-TMGOS-ZHP-TFET) structure has been …

Reduction of corner effect in ZG-ES-TFET for improved electrical performance and its reliability analysis in the presence of traps

T Ashok, CK Pandey - ECS Journal of Solid State Science and …, 2023 - iopscience.iop.org
In this paper, various electrical parameters of a Z-shaped gate elevated source TFET (ZG-ES-
TFET) in the presence of interface traps are investigated. The placement of Z-shaped gate …

Demonstration of a novel Dual-Source Elevated-Channel Dopingless TFET with improved DC and Analog/RF performance

T Ashok, CK Pandey - Microelectronics Journal, 2024 - Elsevier
In this paper, a novel Dual-Source Elevated-Channel Dopingless TFET (DSEC-DLTFET) is
proposed to enhance the dc and analog/high-frequency (HF) performance of the device …

Physics based analysis of a high-performance dual line tunneling TFET with reduced corner effects

T Ashok, CK Pandey - Physica Scripta, 2024 - iopscience.iop.org
To improve the DC and analog/HF performance, a novel dual line tunneling based TFET
(DLT-ES-TFET) with elevated source and L-shaped pocket is proposed in this manuscript. In …

Simulation study of n+ pocket step shape heterodielectric double gate tunnel FET for switching and biosensing applications

R Saha, R Goswami, B Bhowmick, S Baishya - Materials Science and …, 2023 - Elsevier
In this article, an n+ pocket step shape heterodielectric double gate Tunnel TFET (SSHDDG-
TFET) is designed for high frequency and biosensing applications. A calibration of TCAD …

DC and RF/analog parameters in Ge‐source split drain‐ZHP‐TFET: drain and pocket engineering technique

R Saha, DK Panda, R Goswami… - … Journal of Numerical …, 2022 - Wiley Online Library
In this article, a Ge‐source is employed in split drain Z‐shaped line TFET structure (SD‐ZHP‐
TFET) and named as Ge‐source SD‐ZHP‐TFET. The presence of split drain increases the …