Memory devices and applications for in-memory computing

A Sebastian, M Le Gallo, R Khaddam-Aljameh… - Nature …, 2020 - nature.com
Traditional von Neumann computing systems involve separate processing and memory
units. However, data movement is costly in terms of time and energy and this problem is …

Spintronics for energy-efficient computing: An overview and outlook

Z Guo, J Yin, Y Bai, D Zhu, K Shi, G Wang… - Proceedings of the …, 2021 - ieeexplore.ieee.org
From the discovery of giant magnetoresistance (GMR) to tunnel magnetoresistance (TMR),
their subsequent application in large capacity hard disk drives (HDDs) greatly speeded up …

A modern primer on processing in memory

O Mutlu, S Ghose, J Gómez-Luna… - … computing: from devices …, 2022 - Springer
Modern computing systems are overwhelmingly designed to move data to computation. This
design choice goes directly against at least three key trends in computing that cause …

A full spectrum of computing-in-memory technologies

Z Sun, S Kvatinsky, X Si, A Mehonic, Y Cai… - Nature Electronics, 2023 - nature.com
Computing in memory (CIM) could be used to overcome the von Neumann bottleneck and to
provide sustainable improvements in computing throughput and energy efficiency …

[图书][B] Efficient processing of deep neural networks

V Sze, YH Chen, TJ Yang, JS Emer - 2020 - Springer
This book provides a structured treatment of the key principles and techniques for enabling
efficient processing of deep neural networks (DNNs). DNNs are currently widely used for …

Neural cache: Bit-serial in-cache acceleration of deep neural networks

C Eckert, X Wang, J Wang… - 2018 ACM/IEEE …, 2018 - ieeexplore.ieee.org
This paper presents the Neural Cache architecture, which re-purposes cache structures to
transform them into massively parallel compute units capable of running inferences for Deep …

[HTML][HTML] Analog architectures for neural network acceleration based on non-volatile memory

TP Xiao, CH Bennett, B Feinberg, S Agarwal… - Applied Physics …, 2020 - pubs.aip.org
Analog hardware accelerators, which perform computation within a dense memory array,
have the potential to overcome the major bottlenecks faced by digital hardware for data …

Benchmarking a new paradigm: Experimental analysis and characterization of a real processing-in-memory system

J Gómez-Luna, I El Hajj, I Fernandez… - IEEE …, 2022 - ieeexplore.ieee.org
Many modern workloads, such as neural networks, databases, and graph processing, are
fundamentally memory-bound. For such workloads, the data movement between main …

Google workloads for consumer devices: Mitigating data movement bottlenecks

A Boroumand, S Ghose, Y Kim… - Proceedings of the …, 2018 - dl.acm.org
We are experiencing an explosive growth in the number of consumer devices, including
smartphones, tablets, web-based computers such as Chromebooks, and wearable devices …

TRRespass: Exploiting the many sides of target row refresh

P Frigo, E Vannacc, H Hassan… - … IEEE Symposium on …, 2020 - ieeexplore.ieee.org
After a plethora of high-profile RowHammer attacks, CPU and DRAM vendors scrambled to
deliver what was meant to be the definitive hardware solution against the RowHammer …