Hammer: a modular and reusable physical design flow tool
H Liew, D Grubb, J Wright, C Schmidt… - Proceedings of the 59th …, 2022 - dl.acm.org
Process technology scaling and hardware architecture specialization have vastly increased
the need for chip design space exploration, while optimizing for power, performance, and …
the need for chip design space exploration, while optimizing for power, performance, and …
A fast large-integer extended GCD algorithm and hardware design for verifiable delay functions and modular inversion
The extended GCD (XGCD) calculation, which computes Bézout coefficients b_a, b_b such
that b_a∗ a_0+ b_b∗ b_0= GCD (a_0, b_0), is a critical operation in many cryptographic …
that b_a∗ a_0+ b_b∗ b_0= GCD (a_0, b_0), is a critical operation in many cryptographic …
CGRA-RISC: Simulation Infrastructure for Coupling CGRA Accelerator to RISC-V Processor
AFR Ribeiro - 2024 - repositorio-aberto.up.pt
An emergent demand for high-performance and multi-domain computing, such as Deep
Learn-ing, has potentiated alternative computing devices, commonly called accelerators …
Learn-ing, has potentiated alternative computing devices, commonly called accelerators …