Electronic circuit with controllable negative differential resistance and its applications

V Ulansky, A Raza, H Oun - Electronics, 2019 - mdpi.com
Electronic devices and circuits with negative differential resistance (NDR) are widely used in
oscillators, memory devices, frequency multipliers, mixers, etc. Such devices and circuits …

Automatic synthesis of RF front-end blocks using multi-objective evolutionary techniques

R Povoa, I Bastos, N Lourenço, N Horta - Integration, 2016 - Elsevier
Typically the design of a Radio-Frequency (RF) circuit is difficult, time-consuming and often
based around an iterative process. In this manuscript, an automatic synthesis of three typical …

LC-VCO automatic synthesis using multi-objective evolutionary techniques

R Póvoa, R Lourenço, N Lourenço… - … on Circuits and …, 2014 - ieeexplore.ieee.org
Typically the design of oscillators is done aiming at both minimum phase noise and
minimum power consumption, however, these two objectives are contradictory. Yet, this …

CMOS current starved voltage controlled oscillator circuit for a fast locking PLL

AM KK, BJ Kailath - 2015 Annual IEEE India Conference …, 2015 - ieeexplore.ieee.org
Two novel voltage controlled oscillators (CSN-VCO and CSD-VCO) have been proposed in
this paper. CSN-VCO has been designed with 20 transistors while CSD VCO with 24 …

Process variation tolerant wide-band fast PLL with reduced phase noise using adaptive duty cycle control strategy

U Nanda, DP Acharya, D Nayak - International Journal of …, 2021 - Taylor & Francis
This paper presents the effects of manufacturing process variations on the phase-locked
loop (PLL) performances like lock time, lock range and phase noise. At higher operating …

Optimal LC-VCO design through evolutionary algorithms

P Pereira, M Helena Fino, M Ventim-Neves - Analog Integrated Circuits …, 2014 - Springer
The need for implementing low cost, fully integrated RF wireless transceivers has motivated
the widespread use CMOS technology. However, in the particular case for voltage …

A novel solution based on multi-objective AI techniques for optimization of CMOS LC_VCOs

A Mohammadi, M Mohammadi… - … Electronic and Computer …, 2015 - jtec.utem.edu.my
A method of optimizing components and transistors sizing for CMOS Cross-Coupled LC
voltage controlled oscillators is presented in this paper. The design constrains of power …

A 1.7 GHz Tuning Range LC-VCO with Varactors Array and Switched Cross-Coupled Core

RRN Souza, AM Pinto, RL De Orio… - 2024 IEEE Computer …, 2024 - ieeexplore.ieee.org
This work presents an LC-VCO with degeneration resistor core-based topology, Switched
Varactors Array (SVA) for discrete frequency control and Switched Cross-Coupled Core …

Performance Analysis of Dual Threshold CMOS based Current Starved Voltage Controlled Oscillator-A Review

JK Panigrahi, DP Acharya… - 2022 2nd International …, 2022 - ieeexplore.ieee.org
A Dual Threshold CMOS (DTCMOS) based Current Starved Voltage Controlled Oscillator
(CSVCO) has been analysed. The performance of a DTCMOS besed CSVCO is evaluated …

[图书][B] AIDA-CMK: Multi-Algorithm Optimization Kernel Applied to Analog IC Sizing

R Lourenço, N Lourenço, N Horta - 2015 - Springer
The rapid evolution and widespread use of consumer electronic devices such as cell
phones, tablets, or smart TV puts a great innovative pressure on the integrated circuit …