Defense-in-depth: A recipe for logic locking to prevail

MT Rahman, MS Rahman, H Wang, S Tajik, W Khalil… - Integration, 2020 - Elsevier
Logic locking/obfuscation has emerged as an auspicious solution for protecting the
semiconductor intellectual property (IP) from the untrusted entities in the design and …

IP protection and supply chain security through logic obfuscation: A systematic overview

K Shamsi, M Li, K Plaks, S Fazzari, DZ Pan… - ACM Transactions on …, 2019 - dl.acm.org
The globalization of the semiconductor supply chain introduces ever-increasing security and
privacy risks. Two major concerns are IP theft through reverse engineering and malicious …

Secure electronics enabled by atomically thin and photosensitive two-dimensional memtransistors

A Oberoi, A Dodda, H Liu, M Terrones, S Das - ACS nano, 2021 - ACS Publications
The rapid proliferation of security compromised hardware in today's integrated circuit (IC)
supply chain poses a global threat to the reliability of communication, computing, and control …

Nonvolatile reconfigurable 2D Schottky barrier transistors

Z Zhao, S Rakheja, W Zhu - Nano letters, 2021 - ACS Publications
Nonvolatile reconfigurable transistors can be used to implement highly flexible and compact
logic circuits with low power consumption in maintaining the configuration. In this paper, we …

Provably secure camouflaging strategy for IC protection

M Li, K Shamsi, T Meade, Z Zhao, B Yu… - IEEE transactions on …, 2017 - ieeexplore.ieee.org
The advancing of reverse engineering techniques has complicated the efforts in intellectual
property protection. Proactive methods have been developed recently, among which layout …

Obfuscating the interconnects: Low-cost and resilient full-chip layout camouflaging

S Patnaik, M Ashraf, O Sinanoglu… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Layout camouflaging can protect the intellectual property of modern circuits. Most prior art,
however, incurs excessive layout overheads and necessitates customization of active …

Advancing hardware security using polymorphic and stochastic spin-hall effect devices

S Patnaik, N Rangarajan, J Knechtel… - … , Automation & Test …, 2018 - ieeexplore.ieee.org
Protecting intellectual property (IP) in electronic circuits has become a serious challenge in
recent years. Logic locking/encryption and layout camouflaging are two prominent …

Satisfiability attack-resistant camouflaged two-dimensional heterostructure devices

A Wali, S Kundu, AJ Arnold, G Zhao, K Basu, S Das - ACS nano, 2021 - ACS Publications
Reverse engineering (RE) is one of the major security threats to the semiconductor industry
due to the involvement of untrustworthy parties in an increasingly globalized chip …

[HTML][HTML] A survey on security analysis of machine learning-oriented hardware and software intellectual property

A Tauhid, L Xu, M Rahman, E Tomai - High-Confidence Computing, 2023 - Elsevier
Intellectual Property (IP) includes ideas, innovations, methodologies, works of authorship
(viz., literary and artistic works), emblems, brands, images, etc. This property is intangible …

Logic design and simulation of a 128-b AES encryption accelerator based on rapid single-flux-quantum circuits

Y Zhou, GM Tang, JH Yang, PS Yu… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
A 128-b rapid single-flux-quantum (RSFQ) Advanced Encryption Standard (AES) encryption
accelerator based on bit-slice architecture is proposed for the first time. Unlike the traditional …