Field programmable gate array applications—A scientometric review
Field Programmable Gate Array (FPGA) is a general purpose programmable logic device
that can be configured by a customer after manufacturing to perform from a simple logic gate …
that can be configured by a customer after manufacturing to perform from a simple logic gate …
FPGA implementation of an efficient FFT processor for FMCW radar signal processing
J Heo, Y Jung, S Lee, Y Jung - Sensors, 2021 - mdpi.com
This paper presents the design and implementation results of an efficient fast Fourier
transform (FFT) processor for frequency-modulated continuous wave (FMCW) radar signal …
transform (FFT) processor for frequency-modulated continuous wave (FMCW) radar signal …
A 60-mode high-throughput parallel-processing FFT processor for 5G/4G applications
Y Guo, Z Wang, Q Hong, H Luo, X Qiu… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
This article presents a 60-mode high-throughput parallel-processing memory-based fast
Fourier transform (FFT) processor for fifth-generation (5G)/4G applications. The proposed …
Fourier transform (FFT) processor for fifth-generation (5G)/4G applications. The proposed …
Memory-based FFT architecture with optimized number of multiplexers and memory usage
This brief presents a new-parallel radix-2 memory-based fast Fourier transform (FFT)
architecture. The aim of this brief is to reduce the number of multiplexers and achieve an …
architecture. The aim of this brief is to reduce the number of multiplexers and achieve an …
VLSI design and implementation of reconfigurable 46-mode combined-radix-based FFT hardware architecture for 3GPP-LTE applications
XY Shih, HR Chou, YQ Liu - … on Circuits and Systems I: Regular …, 2017 - ieeexplore.ieee.org
This paper presents a reconfigurable fast Fourier transform (FFT) hardware architecture,
supporting 46 different FFT sizes defined in 3GPP-LTE applications. Our proposed design …
supporting 46 different FFT sizes defined in 3GPP-LTE applications. Our proposed design …
A memory-based FFT processor design with generalized efficient conflict-free address schemes
KF Xia, B Wu, T Xiong, TC Ye - IEEE Transactions on Very …, 2017 - ieeexplore.ieee.org
This paper presents the design and implementation of memory-based fast Fourier transform
(FFT) processors with generalized efficient, conflict-free address schemes. We unified the …
(FFT) processors with generalized efficient, conflict-free address schemes. We unified the …
Hardware architectures for the fast Fourier transform
The fast Fourier transform (FFT) is a widely used algorithm in signal processing applications.
FFT hardware architectures are designed to meet the requirements of the most demanding …
FFT hardware architectures are designed to meet the requirements of the most demanding …
World's fastest FFT architectures: Breaking the barrier of 100 GS/s
This paper presents the fastest fast Fourier transform (FFT) hardware architectures so far.
The architectures are based on a fully parallel implementation of the FFT algorithm. In order …
The architectures are based on a fully parallel implementation of the FFT algorithm. In order …
FPGA implementation of a 10 GS/s variable-length FFT for OFDM-based optical communication systems
The transmission rate in current passive optical networks can be increased by employing
Orthogonal Frequency Division Multiplexing (OFDM) modulation. The computational kernel …
Orthogonal Frequency Division Multiplexing (OFDM) modulation. The computational kernel …
A modified signal flow graph and corresponding conflict-free strategy for memory-based FFT processor design
Y Tian, Y Hei, Z Liu, Q Shen, Z Di… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
This brief presents a modified radix-4 fast Fourier transform (FFT) signal flow graph, whose
input and output both are in natural order. Compared with the conventional radix-4 signal …
input and output both are in natural order. Compared with the conventional radix-4 signal …